US Patent Application 18118350. INSPECTION SYSTEM AND INSPECTION METHOD FOR SEMICONDUCTOR DEVICE simplified abstract
Contents
INSPECTION SYSTEM AND INSPECTION METHOD FOR SEMICONDUCTOR DEVICE
Organization Name
Inventor(s)
INSPECTION SYSTEM AND INSPECTION METHOD FOR SEMICONDUCTOR DEVICE - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 18118350 Titled 'INSPECTION SYSTEM AND INSPECTION METHOD FOR SEMICONDUCTOR DEVICE'
Simplified Explanation
The abstract describes an optical failure detection system that is used to test semiconductor devices. The system includes a test chamber with an opening, a substrate plate with a wafer on one side and an optical window in the center, and a temperature control device that can heat or cool the semiconductor devices on the wafer. There is also an optical device in the test chamber that emits light towards the semiconductor devices through the optical window.
Original Abstract Submitted
An optical failure detection system includes a test chamber having an accommodating space therein, the test chamber including an upper cover having an opening therein; a substrate plate provided in the opening of the upper cover, the substrate plate including: a first surface on which a wafer is disposed; a second surface opposite to the first surface; and an optical window formed in a central region of the substrate plate and through which the wafer is exposed; a temperature control device including a plurality of thermoelectric devices provided around the optical window of the substrate plate, the temperature control device being configured to heat or cool at least one semiconductor device of the wafer; and an optical device provided in the accommodating space of the test chamber, the optical device being configured to radiate light toward the at least one semiconductor device through the optical window.
