Intel Corporation patent applications published on November 9th, 2023
Summary of the patent applications from Intel Corporation on November 9th, 2023
Intel Corporation has recently filed several patents related to various technologies and applications. These patents cover areas such as semiconductor devices, memory manufacturing processes, Multi-Access Edge Computing (MEC) and Operator Platform (OP) systems, wireless communication channel validation, programming flexible accelerated network pipelines, link performance predictions, secure computing environments in federated Edge Clouds, physical uplink control channel (PUCCH) designs, radio frequency circuits, electronic packages, and electrical interconnect bridges.
Summary: - Intel Corporation has filed patents related to semiconductor devices, memory manufacturing processes, MEC and OP systems, wireless communication channel validation, network pipeline programming, link performance predictions, secure computing environments, PUCCH designs, radio frequency circuits, electronic packages, and electrical interconnect bridges. - Notable applications include techniques for etching trenches through multiple layers of memory, protecting phase-change layers using amorphous silicon, coordinating MEC and EDGEAPP systems for enhanced performance, operating channel validation in wireless communication, programming network controllers based on offload hints, managing link performance predictions using algorithms and machine learning, creating secure computing environments in federated Edge Clouds, designing PUCCH for high-frequency carrier systems, and forming electronic packages with redistribution layers and interposers.
Bullet Points:
- Patents cover semiconductor devices, memory manufacturing, MEC and OP systems, wireless communication, network pipeline programming, link performance predictions, secure computing environments, PUCCH designs, radio frequency circuits, electronic packages, and electrical interconnect bridges.
- Techniques for etching trenches through memory layers and protecting phase-change layers using amorphous silicon.
- Coordination of MEC and EDGEAPP systems for improved performance in Operator Platforms.
- Operating channel validation in wireless communication using primary and secondary operating channels.
- Programming network controllers based on requested offload hints and performing packet processing.
- Managing link performance predictions using algorithms and machine learning models.
- Creating secure computing environments in federated Edge Clouds based on trust levels.
- Designing PUCCH for high-frequency carrier systems using DFT-s-OFDM waveforms.
- Radio frequency circuits with substrate connection structures and integrated front-end circuitry.
- Electronic packages with redistribution layers, interposers, and multiple communicatively coupled dies.
- Electrical interconnect bridges with multiple routing layers and vias for interconnecting different layers.
Contents
- 1 Patent applications for Intel Corporation on November 9th, 2023
- 1.1 APPARATUSES AND METHODS FOR ANALYZING MULTIPLE OPTICAL SIGNALS IN PARALLEL (17737067)
- 1.2 INSPECTION TOOL AND INSPECTION METHOD (17737045)
- 1.3 SYSTEMS, APPARATUSES, OR COMPONENTS FOR ELECTROLYTIC CORROSION PROTECTION OF ELECTRONIC ELEMENT TESTING APPARATUSES (17737047)
- 1.4 APPARATUS AND METHOD FOR PROTECTING PROBE CARD AND PROBES USING THERMAL HEAT SENSOR TRACE (17737042)
- 1.5 REDUCED BRIDGE STRUCTURE FOR A PHOTONIC INTEGRATED CIRCUIT (17740068)
- 1.6 SYSTEM AND PROCESS FOR CLEANING A MEMBRANE (17738024)
- 1.7 CURRENT CONTROL FOR A MULTICORE PROCESSOR (18353790)
- 1.8 COMPUTER-ASSISTED OR AUTONOMOUS DRIVING VEHICLES SOCIAL NETWORK (18352224)
- 1.9 COMPUTE OPTIMIZATIONS FOR NEURAL NETWORKS (18315625)
- 1.10 STACK ACCESS THROTTLING FOR SYNCHRONOUS RAY TRACING (17589689)
- 1.11 DYNAMIC LOAD BALANCING OF COMPUTE ASSETS AMONG DIFFERENT COMPUTE CONTEXTS (18195230)
- 1.12 TECHNOLOGIES FOR HIERARCHICAL CLUSTERING OF HARDWARE RESOURCES IN NETWORK FUNCTION VIRTUALIZATION DEPLOYMENTS (18195314)
- 1.13 SYSTEM AND METHOD FOR GRANULAR RESET MANAGEMENT WITHOUT REBOOT (18312759)
- 1.14 IN-NETWORK COLLECTIVE OPERATIONS (18222946)
- 1.15 Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Array Matrix Multipliers (18222989)
- 1.16 COMPUTING DEVICES WITH SECURE BOOT OPERATIONS (18223399)
- 1.17 METHODS AND APPARATUS FOR DISCRIMINATIVE SEMANTIC TRANSFER AND PHYSICS-INSPIRED OPTIMIZATION OF FEATURES IN DEEP LEARNING (18142997)
- 1.18 METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO RE-PARAMETERIZE MULTIPLE HEAD NETWORKS OF AN ARTIFICIAL INTELLIGENCE MODEL (18312584)
- 1.19 MULTI-PLANE IMAGE COMPRESSION (17926532)
- 1.20 GRAPHICS ARCHITECTURE INCLUDING A NEURAL NETWORK PIPELINE (18310015)
- 1.21 DEPOSITION TOOL AND METHOD FOR FILLING DEEP TRENCHES (17738028)
- 1.22 GATE ALIGNED CONTACT AND METHOD TO FABRICATE SAME (18221754)
- 1.23 TECHNIQUES AND CONFIGURATIONS TO REDUCE TRANSISTOR GATE SHORT DEFECTS (18223981)
- 1.24 IC PACKAGE INCLUDING MULTI-CHIP UNIT WITH BONDED INTEGRATED HEAT SPREADER (18222855)
- 1.25 DESIGN OPTIMIZATION FOR RASTER SCANNING (17738085)
- 1.26 MICRO THROUGH-SILICON VIA FOR TRANSISTOR DENSITY SCALING (18216040)
- 1.27 ELECTRICAL INTERCONNECT BRIDGE (18224504)
- 1.28 HYBRID FAN-OUT ARCHITECTURE WITH EMIB AND GLASS CORE FOR HETEROGENEOUS DIE INTEGRATION APPLICATIONS (18224794)
- 1.29 DISTRIBUTED RADIOHEAD SYSTEM (18029932)
- 1.30 PHYSICAL UPLINK CONTROL CHANNEL DESIGN FOR DISCRETE FOURIER TRANSFORM-SPREAD-ORTHOGONAL FREQUENCY-DIVISION MULTIPLEXING (DFT-S-OFDM) WAVEFORMS (18347247)
- 1.31 SECURE APPLICATION COMPUTING ENVIRONMENT IN A FEDERATED EDGE CLOUD (18223887)
- 1.32 LINK PERFORMANCE PREDICTION TECHNOLOGIES (18356423)
- 1.33 TECHNOLOGIES FOR PROGRAMMING FLEXIBLE ACCELERATED NETWORK PIPELINE USING EBPF (18213514)
- 1.34 OPERATING CHANNEL VALIDATION UNDER PROTECTED BEACON (18352189)
- 1.35 OPERATOR PLATFORM INSTANCE FOR MEC FEDERATION TO SUPPORT NETWORK-AS-A-SERVICE (18216257)
- 1.36 TECHNOLOGIES FOR SEMICONDUCTOR DEVICES INCLUDING AMORPHOUS SILICON (17735529)
Patent applications for Intel Corporation on November 9th, 2023
APPARATUSES AND METHODS FOR ANALYZING MULTIPLE OPTICAL SIGNALS IN PARALLEL (17737067)
Main Inventor
Henry WLADKOWSKI
INSPECTION TOOL AND INSPECTION METHOD (17737045)
Main Inventor
Jianyong MO
SYSTEMS, APPARATUSES, OR COMPONENTS FOR ELECTROLYTIC CORROSION PROTECTION OF ELECTRONIC ELEMENT TESTING APPARATUSES (17737047)
Main Inventor
Minh Nhat DANG
APPARATUS AND METHOD FOR PROTECTING PROBE CARD AND PROBES USING THERMAL HEAT SENSOR TRACE (17737042)
Main Inventor
Arthur ISAKHAROV
REDUCED BRIDGE STRUCTURE FOR A PHOTONIC INTEGRATED CIRCUIT (17740068)
Main Inventor
Chia-Pin Chiu
SYSTEM AND PROCESS FOR CLEANING A MEMBRANE (17738024)
Main Inventor
Safak SAYAN
CURRENT CONTROL FOR A MULTICORE PROCESSOR (18353790)
Main Inventor
Alexander Gendler
COMPUTER-ASSISTED OR AUTONOMOUS DRIVING VEHICLES SOCIAL NETWORK (18352224)
Main Inventor
Fatema Adenwala
COMPUTE OPTIMIZATIONS FOR NEURAL NETWORKS (18315625)
Main Inventor
Kevin Nealis
STACK ACCESS THROTTLING FOR SYNCHRONOUS RAY TRACING (17589689)
Main Inventor
PAWEL MAJEWSKI
DYNAMIC LOAD BALANCING OF COMPUTE ASSETS AMONG DIFFERENT COMPUTE CONTEXTS (18195230)
Main Inventor
James VALERIO
TECHNOLOGIES FOR HIERARCHICAL CLUSTERING OF HARDWARE RESOURCES IN NETWORK FUNCTION VIRTUALIZATION DEPLOYMENTS (18195314)
Main Inventor
Andrey Chilikin
SYSTEM AND METHOD FOR GRANULAR RESET MANAGEMENT WITHOUT REBOOT (18312759)
Main Inventor
Bharat S. PILLILLI
IN-NETWORK COLLECTIVE OPERATIONS (18222946)
Main Inventor
Vivek KASHYAP
Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Array Matrix Multipliers (18222989)
Main Inventor
Jack Z. Yinger
COMPUTING DEVICES WITH SECURE BOOT OPERATIONS (18223399)
Main Inventor
Yeluri Raghuram
METHODS AND APPARATUS FOR DISCRIMINATIVE SEMANTIC TRANSFER AND PHYSICS-INSPIRED OPTIMIZATION OF FEATURES IN DEEP LEARNING (18142997)
Main Inventor
Anbang YAO
METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO RE-PARAMETERIZE MULTIPLE HEAD NETWORKS OF AN ARTIFICIAL INTELLIGENCE MODEL (18312584)
Main Inventor
Vinnam Kim
MULTI-PLANE IMAGE COMPRESSION (17926532)
Main Inventor
Scott JANUS
GRAPHICS ARCHITECTURE INCLUDING A NEURAL NETWORK PIPELINE (18310015)
Main Inventor
HUGUES LABBE
DEPOSITION TOOL AND METHOD FOR FILLING DEEP TRENCHES (17738028)
Main Inventor
Elijah V. KARPOV
GATE ALIGNED CONTACT AND METHOD TO FABRICATE SAME (18221754)
Main Inventor
Oleg GOLONZKA
TECHNIQUES AND CONFIGURATIONS TO REDUCE TRANSISTOR GATE SHORT DEFECTS (18223981)
Main Inventor
Sridhar GOVINDARAJU
IC PACKAGE INCLUDING MULTI-CHIP UNIT WITH BONDED INTEGRATED HEAT SPREADER (18222855)
Main Inventor
Debendra MALLIK
DESIGN OPTIMIZATION FOR RASTER SCANNING (17738085)
Main Inventor
Vinith BEJUGAM
MICRO THROUGH-SILICON VIA FOR TRANSISTOR DENSITY SCALING (18216040)
Main Inventor
Bok Eng CHEAH
ELECTRICAL INTERCONNECT BRIDGE (18224504)
Main Inventor
Srinivas V. PIETAMBARAM
HYBRID FAN-OUT ARCHITECTURE WITH EMIB AND GLASS CORE FOR HETEROGENEOUS DIE INTEGRATION APPLICATIONS (18224794)
Main Inventor
Srinivas PIETAMBARAM
DISTRIBUTED RADIOHEAD SYSTEM (18029932)
Main Inventor
Jayprakash THAKUR
PHYSICAL UPLINK CONTROL CHANNEL DESIGN FOR DISCRETE FOURIER TRANSFORM-SPREAD-ORTHOGONAL FREQUENCY-DIVISION MULTIPLEXING (DFT-S-OFDM) WAVEFORMS (18347247)
Main Inventor
Gang Xiong
SECURE APPLICATION COMPUTING ENVIRONMENT IN A FEDERATED EDGE CLOUD (18223887)
Main Inventor
Dario Sabella
LINK PERFORMANCE PREDICTION TECHNOLOGIES (18356423)
Main Inventor
Jonas Svennebring
TECHNOLOGIES FOR PROGRAMMING FLEXIBLE ACCELERATED NETWORK PIPELINE USING EBPF (18213514)
Main Inventor
Peter P. WASKIEWICZ, JR.
OPERATING CHANNEL VALIDATION UNDER PROTECTED BEACON (18352189)
Main Inventor
Ido Ouzieli
OPERATOR PLATFORM INSTANCE FOR MEC FEDERATION TO SUPPORT NETWORK-AS-A-SERVICE (18216257)
Main Inventor
Dario Sabella
TECHNOLOGIES FOR SEMICONDUCTOR DEVICES INCLUDING AMORPHOUS SILICON (17735529)
Main Inventor
Luca Fumagalli
