US Patent Application 18222855. IC PACKAGE INCLUDING MULTI-CHIP UNIT WITH BONDED INTEGRATED HEAT SPREADER simplified abstract
Contents
IC PACKAGE INCLUDING MULTI-CHIP UNIT WITH BONDED INTEGRATED HEAT SPREADER
Organization Name
Inventor(s)
Debendra Mallik of Chandler AZ (US)
Ravindranath Mahajan of Chandler AZ (US)
Digvijay Raorane of Chandler AZ (US)
IC PACKAGE INCLUDING MULTI-CHIP UNIT WITH BONDED INTEGRATED HEAT SPREADER - A simplified explanation of the abstract
This abstract first appeared for US patent application 18222855 titled 'IC PACKAGE INCLUDING MULTI-CHIP UNIT WITH BONDED INTEGRATED HEAT SPREADER
Simplified Explanation
- The patent application describes a multi-chip unit for chip-level packaging. - The unit includes multiple IC chips that are interconnected through a metal redistribution structure. - The IC chips are directly bonded to an integrated heat spreader, eliminating the need for thermal interface material. - This direct bonding reduces the bond line thickness and thermal resistance. - The integrated heat spreader also serves as a structural member of the unit. - The second side of the redistribution structure can be interconnected to a host using solder interconnects. - A sacrificial interposer is used to planarize IC chips of different thicknesses before bonding the heat spreader. - The sacrificial interposer can be removed to expose the redistribution layer for further interconnection to a substrate without through-substrate vias.
Original Abstract Submitted
A multi-chip unit suitable for chip-level packaging may include multiple IC chips that are interconnected through a metal redistribution structure, and that are directly bonded to an integrated heat spreader. Bonding of the integrated heat spreader to the multiple IC chips may be direct so that no thermal interface material (TIM) is needed, resulting in a reduced bond line thickness (BLT) and lower thermal resistance. The integrated heat spreader may further serve as a structural member of the multi-chip unit, allowing a second side of the redistribution structure to be further interconnected to a host by solder interconnects. The redistribution structure may be fabricated on a sacrificial interposer that may facilitate planarizing IC chips of differing thickness prior to bonding the heat spreader. The sacrificial interposer may be removed to expose the RDL for further interconnection to a substrate without the use of through-substrate vias.
