US Patent Application 18221754. GATE ALIGNED CONTACT AND METHOD TO FABRICATE SAME simplified abstract

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GATE ALIGNED CONTACT AND METHOD TO FABRICATE SAME

Organization Name

Intel Corporation


Inventor(s)

Oleg Golonzka of Beaverton OR (US)

Swaminathan Sivakumar of Beaverton OR (US)

Charles H. Wallace of Portland OR (US)

Tahir Ghani of Portland OR (US)

GATE ALIGNED CONTACT AND METHOD TO FABRICATE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 18221754 titled 'GATE ALIGNED CONTACT AND METHOD TO FABRICATE SAME

Simplified Explanation

The patent application describes gate aligned contacts and methods of forming them in a semiconductor structure.

  • Gate aligned contacts are formed by placing contact plugs directly between the sidewall spacers of adjacent gate structures.
  • The gate structures consist of a gate dielectric layer, a gate electrode, and sidewall spacers.
  • The contact plugs and contacts are formed after the gate structures are created.
  • This method allows for efficient and precise formation of gate aligned contacts in a semiconductor structure.


Original Abstract Submitted

Gate aligned contacts and methods of forming gate aligned contacts are described. For example, a method of fabricating a semiconductor structure includes forming a plurality of gate structures above an active region formed above a substrate. The gate structures each include a gate dielectric layer, a gate electrode, and sidewall spacers. A plurality of contact plugs is formed, each contact plug formed directly between the sidewall spacers of two adjacent gate structures of the plurality of gate structures. A plurality of contacts is formed, each contact formed directly between the sidewall spacers of two adjacent gate structures of the plurality of gate structures. The plurality of contacts and the plurality of gate structures are formed subsequent to forming the plurality of contact plugs.