Micron Technology, Inc. patent applications published on October 12th, 2023
Summary of the patent applications from Micron Technology, Inc. on October 12th, 2023
Micron Technology, Inc. has recently filed several patents related to various technologies and devices. These patents cover areas such as three-dimensional memory arrays, integrated assemblies, memory devices and systems, lighting systems, clock management circuitry, ferroelectric transistors, memory cells and control gates, scribe asymmetry, and conductive patterns on semiconductor substrates.
Notable applications of these patents include:
- Creating trench and pier architectures in three-dimensional memory arrays, allowing for self-alignment in subsequent operations.
- Integrated assemblies with different memory regions, intermediate regions, and staircase regions, providing efficient memory storage and organization.
- Memory devices with memory cells and transistors, where data lines directly interface with the transistor's gate.
- Lighting systems that use solid state lighting devices to generate mixed light, with closed-loop control for efficient and effective lighting.
- Clock management circuitry that adjusts the frequency of clocking signals based on detected voltage, current, and/or activity, reducing power consumption.
- Ferroelectric transistors with two electrodes, an active region, and a ferroelectric material, allowing for controlled flow of current.
- Memory cells and control gates stacked in multiple tiers, with conductive contacts, dielectric structures, and support structures for efficient memory storage.
- Devices with scribe asymmetry, where scribes have different widths to improve fabrication efficiency and aid in testing and integration.
- Apparatuses with conductive patterns on semiconductor substrates, including sections and slits that extend in different directions, providing versatile electrical connections.
Overall, Micron Technology, Inc. has filed patents covering a wide range of technologies and devices related to memory arrays, integrated assemblies, lighting systems, clock management, transistors, memory cells, scribe asymmetry, and conductive patterns. These patents demonstrate the organization's commitment to innovation and advancement in the field of semiconductor technology.
Contents
- 1 Patent applications for Micron Technology, Inc. on October 12th, 2023
- 1.1 APPARATUS HAVING SEGMENTED DATA LINES AND METHODS OF THEIR OPERATION (18117553)
- 1.2 FINE GRAINED RESOURCE MANAGEMENT FOR ROLLBACK MEMORY OPERATIONS (17716250)
- 1.3 TECHNIQUES FOR FOUR CYCLE ACCESS COMMANDS (18161757)
- 1.4 STORAGE SYSTEM WITH MULTIPLE DATA PATHS DEPENDING ON DATA CLASSIFICATIONS (18295482)
- 1.5 Split a Tensor for Shuffling in Outsourcing Computation Tasks (17715863)
- 1.6 Partition a Tensor with Varying Granularity Levels in Shuffled Secure Multiparty Computation (17715877)
- 1.7 Non-uniform Splitting of a Tensor in Shuffled Secure Multiparty Computation (17715885)
- 1.8 MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES (18207525)
- 1.9 EFFICIENT CACHE PROGRAM OPERATION WITH DATA ENCODING (18178105)
- 1.10 SECURE OPERATING SYSTEM UPDATE (17717954)
- 1.11 MEMORY ACCESS GATE (18136250)
- 1.12 ASSURING INTEGRITY AND SECURE ERASURE OF CRITICAL SECURITY PARAMETERS (18208585)
- 1.13 Secure Artificial Neural Network Models in Outsourcing Deep Learning Computation (17715835)
- 1.14 Shuffled Secure Multiparty Deep Learning (17715768)
- 1.15 Secure Multiparty Deep Learning via Shuffling and Offsetting (17715798)
- 1.16 NON-DESTRUCTIVE PATTERN IDENTIFICATION AT A MEMORY DEVICE (17716580)
- 1.17 APPARATUS AND METHODS FOR THERMAL MANAGEMENT IN A MEMORY (17704154)
- 1.18 FASTER MULTI-CELL READ OPERATION USING REVERSE READ CALIBRATIONS (18117268)
- 1.19 TEST CIRCUIT IN SCRIBE REGION FOR MEMORY FAILURE ANALYSIS (17719327)
- 1.20 MEMORY DEVICE INCLUDING SELF-ALIGNED CONDUCTIVE CONTACTS (18200852)
- 1.21 SEMICONDUCTOR DEVICE HAVING L-SHAPED CONDUCTIVE PATTERN (17714797)
- 1.22 TECHNIQUES FOR FORMING A DEVICE WITH SCRIBE ASYMMETRY (17715481)
- 1.23 MEMORY DEVICE INCLUDING SUPPORT STRUCTURES (18209231)
- 1.24 Ferroelectric Transistors and Assemblies Comprising Ferroelectric Transistors (18207905)
- 1.25 TRANSIENT LOAD MANAGEMENT (17715552)
- 1.26 SOLID STATE LIGHTING SYSTEMS AND ASSOCIATED METHODS OF OPERATION AND MANUFACTURE (18335885)
- 1.27 METAL GATE MEMORY DEVICE AND METHOD (17717406)
- 1.28 Integrated Assemblies and Methods of Forming Integrated Assemblies (18207499)
- 1.29 TRENCH AND PIER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS (17714771)
Patent applications for Micron Technology, Inc. on October 12th, 2023
APPARATUS HAVING SEGMENTED DATA LINES AND METHODS OF THEIR OPERATION (18117553)
Main Inventor
Vikas Rana
FINE GRAINED RESOURCE MANAGEMENT FOR ROLLBACK MEMORY OPERATIONS (17716250)
Main Inventor
Tony M. Brewer
TECHNIQUES FOR FOUR CYCLE ACCESS COMMANDS (18161757)
Main Inventor
Sujeet V. Ayyapureddi
STORAGE SYSTEM WITH MULTIPLE DATA PATHS DEPENDING ON DATA CLASSIFICATIONS (18295482)
Main Inventor
Reshmi BASU
Split a Tensor for Shuffling in Outsourcing Computation Tasks (17715863)
Main Inventor
Andre Xian Ming Chang
Partition a Tensor with Varying Granularity Levels in Shuffled Secure Multiparty Computation (17715877)
Main Inventor
Andre Xian Ming Chang
Non-uniform Splitting of a Tensor in Shuffled Secure Multiparty Computation (17715885)
Main Inventor
Andre Xian Ming Chang
MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES (18207525)
Main Inventor
Kishore Kumar Muchherla
EFFICIENT CACHE PROGRAM OPERATION WITH DATA ENCODING (18178105)
Main Inventor
Sushanth Bhushan
SECURE OPERATING SYSTEM UPDATE (17717954)
Main Inventor
Zhan Liu
MEMORY ACCESS GATE (18136250)
Main Inventor
Giuseppe Cariello
ASSURING INTEGRITY AND SECURE ERASURE OF CRITICAL SECURITY PARAMETERS (18208585)
Main Inventor
Walter Andrew Hubis
Secure Artificial Neural Network Models in Outsourcing Deep Learning Computation (17715835)
Main Inventor
Andre Xian Ming Chang
Shuffled Secure Multiparty Deep Learning (17715768)
Main Inventor
Andre Xian Ming Chang
Secure Multiparty Deep Learning via Shuffling and Offsetting (17715798)
Main Inventor
Andre Xian Ming Chang
NON-DESTRUCTIVE PATTERN IDENTIFICATION AT A MEMORY DEVICE (17716580)
Main Inventor
Yuan He
APPARATUS AND METHODS FOR THERMAL MANAGEMENT IN A MEMORY (17704154)
Main Inventor
Jeremy Binfet
FASTER MULTI-CELL READ OPERATION USING REVERSE READ CALIBRATIONS (18117268)
Main Inventor
Go Shikata
TEST CIRCUIT IN SCRIBE REGION FOR MEMORY FAILURE ANALYSIS (17719327)
Main Inventor
ATSUKO OTSUKA
MEMORY DEVICE INCLUDING SELF-ALIGNED CONDUCTIVE CONTACTS (18200852)
Main Inventor
Kar Wui Thong
SEMICONDUCTOR DEVICE HAVING L-SHAPED CONDUCTIVE PATTERN (17714797)
Main Inventor
Harunobu Kondo
TECHNIQUES FOR FORMING A DEVICE WITH SCRIBE ASYMMETRY (17715481)
Main Inventor
Anna Maria Conti
MEMORY DEVICE INCLUDING SUPPORT STRUCTURES (18209231)
Main Inventor
Andrew Zhe Wei Ong
Ferroelectric Transistors and Assemblies Comprising Ferroelectric Transistors (18207905)
Main Inventor
Kamal M. Karda
TRANSIENT LOAD MANAGEMENT (17715552)
Main Inventor
Leon Zlotnik
SOLID STATE LIGHTING SYSTEMS AND ASSOCIATED METHODS OF OPERATION AND MANUFACTURE (18335885)
Main Inventor
Anil Tipirneni
METAL GATE MEMORY DEVICE AND METHOD (17717406)
Main Inventor
Hyucksoo Yang
Integrated Assemblies and Methods of Forming Integrated Assemblies (18207499)
Main Inventor
Shuangqiang Luo
TRENCH AND PIER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS (17714771)
Main Inventor
Fabio Pellizzer