US Patent Application 18207525. MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES simplified abstract
Contents
MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES
Organization Name
Inventor(s)
Kishore Kumar Muchherla of San Jose CA (US)
Mustafa N. Kaynak of San Diego CA (US)
Sampath K. Ratnam of San Jose CA (US)
Sivagnanam Parthasarathy of Carlsbad CA (US)
Devin M. Batutis of San Jose CA (US)
Xiangang Luo of Fremont CA (US)
MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES - A simplified explanation of the abstract
- This abstract for appeared for US patent application number 18207525 Titled 'MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES'
Simplified Explanation
The abstract describes a system and method that involves a memory device and a processing device. The processing device is able to detect read errors in a specific block of the memory device, which is associated with a voltage offset bin. It then determines the most recent error-handling operation performed on another block associated with the same voltage offset bin. Finally, it performs error-handling to recover the data that experienced the read error.
Original Abstract Submitted
Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including detecting a read error with respect to data residing in a first block of the memory device, wherein the first block is associated with a voltage offset bin; determining a most recently performed error-handling operation performed on a second block associated with the voltage offset bin; and performing the error-handling to recover the data.
