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| | + | '''Summary of the patent applications from Samsung Electronics Co., Ltd. on October 26th, 2023''' |
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| | + | Samsung Electronics Co., Ltd. has recently filed patents related to various technologies including compounds, semiconductor devices, electronic devices, optoelectronic devices, display devices, and cooking apparatus. The patents cover a wide range of applications and technologies, showcasing the organization's diverse research and development efforts. |
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| | + | Summary of Recent Patents: |
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| | + | - A compound formed by combining Chemical Formula 1 and Chemical Formula 2, and its use in compositions, organic optoelectronic devices, and display devices. |
| | + | - An n-type semiconductor compound represented by Chemical Formula 1 or Chemical Formula 2, and its application in image sensors and electronic devices. |
| | + | - An organometallic compound represented by Formula 1. |
| | + | - An electronic device with a camera located underneath the display, featuring a housing, display, and camera pixel with a unique driving circuit design. |
| | + | - An electroluminescent device with multiple layers, including a light emitting layer composed of semiconductor nanoparticles and a p-type organic semiconductor polymer. |
| | + | - A semiconductor device with bottom electrodes having different regions and a supporting pattern on the substrate. |
| | + | - A method of manufacturing a semiconductor device involving trench formation, layer filling, spacer formation, and gate structure formation. |
| | + | - A display apparatus with a display panel, light source module, rear chassis, and heat dissipation member. |
| | + | - A cooking apparatus with a main body, cooking chamber, door, and door lock featuring an interference member with multiple positions. |
| | + | - A cooking apparatus with a plate, heater, and controller that creates recipes with multiple stages based on the operation information of the heater. |
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| | + | Notable Applications: |
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| | + | * Compound combining Chemical Formula 1 and Chemical Formula 2 for organic optoelectronic devices. |
| | + | * N-type semiconductor compound for image sensors and electronic devices. |
| | + | * Organometallic compound for various applications. |
| | + | * Electronic device with camera located underneath the display. |
| | + | * Electroluminescent device with unique light emitting layer composition. |
| | + | * Semiconductor device with different regions in bottom electrodes. |
| | + | * Method of manufacturing a semiconductor device with trench formation and gate structure formation. |
| | + | * Display apparatus with unique arrangement of light sources and heat dissipation member. |
| | + | * Cooking apparatus with door lock featuring interference member with multiple positions. |
| | + | * Cooking apparatus with controller creating recipes with multiple stages based on heater operation information. |
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| | ==Patent applications for Samsung Electronics Co., Ltd. on October 26th, 2023== | | ==Patent applications for Samsung Electronics Co., Ltd. on October 26th, 2023== |
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| | Youngjun CHO | | Youngjun CHO |
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| − | '''Brief explanation'''
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| − | The abstract describes a cleaning device that consists of a housing with a dust collection chamber. The device also includes a main body that can be attached or detached from the housing. The main body has a handle for easy maneuverability. There is a fixing device within the main body that allows it to be connected to the housing in one position and disconnected in another position. Additionally, there is a releasing button that can be connected to the fixing device through a wire. This button can be used to operate the fixing device.
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| − |
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| − | '''Abstract'''
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| − | A cleaning device comprises: a housing having a dust collection chamber; a main body, moveable with respect to the housing, to be coupled to the housing and to be decoupled from the housing, the main body includes a handle; a fixing device, arrangeable in the main body, to couple the main body to the housing to the housing while the main body is moved to a first position with respect to the housing and to decouple the main body from the housing while the main body is moved to a second position with respect to the housing; and a releasing button arrangeable with respect to the main body, and connectable to the fixing device by a wire so that while the release button is connected to the fixing device, the release button is useable to operate the fixing device.
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| | ===CLEANING ROBOT AND CONTROLLING METHOD THEREOF ([[US Patent Application 18139124. CLEANING ROBOT AND CONTROLLING METHOD THEREOF simplified abstract|18139124]])=== | | ===CLEANING ROBOT AND CONTROLLING METHOD THEREOF ([[US Patent Application 18139124. CLEANING ROBOT AND CONTROLLING METHOD THEREOF simplified abstract|18139124]])=== |
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| | Jongsoo HONG | | Jongsoo HONG |
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| − | '''Brief explanation'''
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| − | This abstract describes a cleaning robot that has a main body, a motion driver for movement, a pad motor for rotating a pad on the bottom of the robot, and a humidity sensor to detect moisture around the pad. The robot also has a processor that can control the pad motor and motion driver. If the humidity sensor detects that the moisture level is lower than a set reference level while the robot is in use, the processor will stop the pad motor and return the robot to its docking station.
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| − |
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| − | '''Abstract'''
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| − | A cleaning robot includes: a main body; a motion driver provided in the main body and configured to move the main body; a pad motor provided in the main body and configured to rotate a pad provided on a lower surface of the main body; a humidity sensor provided around the wet cloth pad and configured to detect humidity around the wet cloth pad; and at least one processor configured to control the pad motor to stop rotating the wet cloth pad and control the motion driver to return the cleaning robot to a docking station, in response to determining that current humidity detected by the humidity sensor becomes lower than preset reference humidity while the motion driver and the pad motor are operating.
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| | ===WALKING ASSISTANCE METHOD AND APPARATUSES ([[US Patent Application 18218388. WALKING ASSISTANCE METHOD AND APPARATUSES simplified abstract|18218388]])=== | | ===WALKING ASSISTANCE METHOD AND APPARATUSES ([[US Patent Application 18218388. WALKING ASSISTANCE METHOD AND APPARATUSES simplified abstract|18218388]])=== |
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| | Bokman LIM | | Bokman LIM |
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| − | '''Brief explanation'''
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| − | This abstract describes a method and apparatus for assisting individuals with walking. The method involves measuring the user's walking motion and using that information to define a state variable. Based on this state variable, a torque profile is generated, which can either assist the user's walking motion or provide resistance to it. The torque profile is determined by factors such as the defined state variable, a gain, and a delay.
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| − |
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| − | '''Abstract'''
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| − | A walking assistance method and/or apparatuses configured to perform same are provided. A state variable may be defined based on a result obtained by measuring a gait motion of a user, and a torque profile may be generated based on the defined state variable, a gain and a delay. The generated torque profile may correspond to a torque profile to assist the gait motion, or a torque profile to provide a resistance to the gait motion.
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| | | | |
| | ===SIGNAL MEASUREMENT APPARATUS AND SIGNAL MEASUREMENT METHOD ([[US Patent Application 18216839. SIGNAL MEASUREMENT APPARATUS AND SIGNAL MEASUREMENT METHOD simplified abstract|18216839]])=== | | ===SIGNAL MEASUREMENT APPARATUS AND SIGNAL MEASUREMENT METHOD ([[US Patent Application 18216839. SIGNAL MEASUREMENT APPARATUS AND SIGNAL MEASUREMENT METHOD simplified abstract|18216839]])=== |
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| | Jongpal KIM | | Jongpal KIM |
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| − | '''Brief explanation'''
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| − | The abstract describes a signal measurement apparatus and method. The apparatus includes a switching circuit that sends a differential voltage signal to an amplifier, which then amplifies the signal. There is also a controller that, when the amplified signal reaches a certain threshold, sends a control signal to change the connection of the switching circuit. This causes the switching circuit to reverse the connections between the input terminals of the amplifier and the paths through which the differential voltage signal is transmitted.
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| − | '''Abstract'''
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| − | A signal measurement apparatus and signal measurement method are provided. The signal measurement apparatus includes a switching circuit configured to transmit a differential voltage signal to an amplifier, the amplifier configured to amplify the differential voltage signal; and a controller configured to output, in response to a signal value of the amplified differential voltage signal reaching a first threshold value, a control signal to change a connection of the switching circuit, wherein the switching circuit is configured to, based on the control signal, reverse connections between input terminals of the amplifier and paths along which the differential voltage signal is transmitted.
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| | ===IMAGE FRAME PROCESSING METHOD AND AN ELECTRONIC DEVICE SUPPORTING SAME ([[US Patent Application 18215531. IMAGE FRAME PROCESSING METHOD AND AN ELECTRONIC DEVICE SUPPORTING SAME simplified abstract|18215531]])=== | | ===IMAGE FRAME PROCESSING METHOD AND AN ELECTRONIC DEVICE SUPPORTING SAME ([[US Patent Application 18215531. IMAGE FRAME PROCESSING METHOD AND AN ELECTRONIC DEVICE SUPPORTING SAME simplified abstract|18215531]])=== |
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| | Sujung BAE | | Sujung BAE |
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| − | '''Brief explanation'''
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| − | This abstract describes an electronic device that has an input device, a display, a communication circuit, and a processor. The device can receive an image frame from another device, display it, and receive user input. Based on the displayed image frame and the user input, the device can predict a second user input and generate a corresponding prediction input event. This event is then transmitted back to the other device, which sends a second image frame based on the prediction input event. The device then displays this second image frame.
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| − | '''Abstract'''
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| − | An electronic device includes an input device, a display, a communication circuit, and a processor operatively connected to the input device, the display, and the communication circuit. The processor is configured to receive a first image frame from an external electronic device through the communication circuit; display the received first image frame, receive a first user input through the input device in a state in which the first image frame is displayed, predict a second user input on the basis of the first image frame and the first user input, generate a prediction input event corresponding to the predicted second user input, transmit information on the prediction input event to the external electronic device through the communication circuit, receive a second image frame according to the prediction input event from the external electronic device through the communication circuit and display the received second image frame.
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| | ===ELECTROSTATIC CHUCK APPARATUS ([[US Patent Application 18126017. ELECTROSTATIC CHUCK APPARATUS simplified abstract|18126017]])=== | | ===ELECTROSTATIC CHUCK APPARATUS ([[US Patent Application 18126017. ELECTROSTATIC CHUCK APPARATUS simplified abstract|18126017]])=== |
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| | Yoshiaki Moriya | | Yoshiaki Moriya |
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| − | '''Brief explanation'''
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| − | The abstract describes an electrostatic chuck apparatus that is designed to reduce temperature imbalance in a heated wafer substrate. The apparatus includes a base with a cooling flow path, an adiabatic layer, a uniform heating plate, a heating element, an insulating layer with a ceramic material, a conductive layer with a smaller area than the insulating layer, and a dielectric layer with a ceramic material.
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| − | '''Abstract'''
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| − | An electrostatic chuck apparatus is provided that is capable of effectively reducing temperature imbalance of a wafer substrate that is heated to a high temperature. The electrostatic chuck apparatus includes a base including a cooling flow path through which a refrigerant may flow, an adiabatic layer on the base, a uniform heating plate on the adiabatic layer, a heating element between the adiabatic layer and the uniform heating plate, an insulating layer on the uniform heating plate and including a ceramic, a conductive layer on the insulating layer and having an area smaller than an area of the insulating layer, and a dielectric layer on the conductive layer and including a ceramic.
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| | ===GRINDING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME ([[US Patent Application 17977018. GRINDING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME simplified abstract|17977018]])=== | | ===GRINDING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME ([[US Patent Application 17977018. GRINDING APPARATUS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING THE SAME simplified abstract|17977018]])=== |
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| | Junghyun ROH | | Junghyun ROH |
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| − | '''Brief explanation'''
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| − | The abstract describes a grinding apparatus and a method for manufacturing a semiconductor device using the apparatus. The grinding apparatus consists of a chuck unit that holds the substrate, a grinding unit that grinds the substrate, and a dressing unit located beneath the grinding unit. The dressing unit includes a dressing board that is used to maintain the condition of the grinding unit, and magnets are placed under the dressing board.
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| − | '''Abstract'''
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| − | A grinding apparatus and a method for manufacturing a semiconductor device using the same are provided. A griding apparatus includes a chuck unit configured to receive a substrate, a grinding unit on a part of the chuck unit and configured to grind the substrate, and a dressing unit under a part of the grinding unit adjacent to the chuck unit and including a dressing board configured to dress the grinding unit and magnets under the dressing board.
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| | ===RAIL INSPECTION DEVICE ([[US Patent Application 18094827. RAIL INSPECTION DEVICE simplified abstract|18094827]])=== | | ===RAIL INSPECTION DEVICE ([[US Patent Application 18094827. RAIL INSPECTION DEVICE simplified abstract|18094827]])=== |
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| | In Kyeong HWANG | | In Kyeong HWANG |
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| − | '''Brief explanation'''
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| − | The abstract describes a rail inspection device that is used to inspect railway tracks. The device has a drive part that moves along the lower rail, with side wheels on opposite sides of the drive part to facilitate movement in one direction. There are also upper wheels on the top of the drive part that make contact with a branch guide rail above it. The device also includes a body connected to the lower surface of the drive part and an inclination sensor on the upper surface to measure the body's inclination.
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| − |
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| − | '''Abstract'''
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| − | A rail inspection device is provided. The rail inspection device includes: a drive part configured to drive on a lower rail; side wheels configured to rotate such that the drive part moves in a first direction on the lower rail, wherein the side wheels are provided on two side surfaces of the drive part opposite to each other in a second direction that intersects the first direction; upper wheels provided on an upper surface of the drive part and configured to rotate in contact with a branch guide rail provided above an upper portion of the drive part; a body connected to a lower surface of the drive part in a third direction that is perpendicular to the first direction and the second direction; and an inclination sensor provided on the upper surface of the drive part and configured to measure an inclination of the body.
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| | ===COOKING APPARATUS AND METHOD OF CONTROLLING THE SAME ([[US Patent Application 18338687. COOKING APPARATUS AND METHOD OF CONTROLLING THE SAME simplified abstract|18338687]])=== | | ===COOKING APPARATUS AND METHOD OF CONTROLLING THE SAME ([[US Patent Application 18338687. COOKING APPARATUS AND METHOD OF CONTROLLING THE SAME simplified abstract|18338687]])=== |
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| | Jaeseok LEE | | Jaeseok LEE |
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| − | '''Brief explanation'''
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| − | The abstract describes a cooking apparatus that can heat food. It has a module for cooking, a module for communication with a user's device, and a processor to control the cooking module based on commands from the user's device. If the communication is lost, the cooking operation will stop.
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| − | '''Abstract'''
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| − | A cooking apparatus is provided. The cooking apparatus includes a cooking module configured to perform a cooking operation by heating an object to be heated, a communication module configured to communicate with a user terminal, and at least one processor configured to control the cooking module to perform the cooking operation based on a control command received from the user terminal, and control the cooking module to stop the cooking operation in response to disconnection of communication with the user terminal.
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| | ===REFRIGERATOR ([[US Patent Application 18216971. REFRIGERATOR simplified abstract|18216971]])=== | | ===REFRIGERATOR ([[US Patent Application 18216971. REFRIGERATOR simplified abstract|18216971]])=== |
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| | Seungmin LEE | | Seungmin LEE |
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| − | '''Brief explanation'''
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| − | This abstract describes a refrigerator that has an inner case for storing food, an outer case for protection, and an insulator between the two cases. The refrigerator also has an evaporator on the back inside surface of the inner case, which cools the air. Below the evaporator, there is a drain device that collects and removes defrost water. The drain device consists of an upper insulator, a drain housing for water drainage, and a middle insulator that holds the drain housing in place.
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| − | '''Abstract'''
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| − | A refrigerator includes: an inner case defining a storage room; an outer case coupled to an outer side of the inner case; an insulator between the inner case and the outer case; an evaporator disposed on a rear inner surface of the inner case; and a drain device disposed below the evaporator and configured to drain defrost water falling from the evaporator, wherein the drain device may include: an upper insulator disposed on the rear inner surface of the inner case; a drain housing disposed below the upper insulator and through with the defrost water is drained; and a middle insulator disposed on a lower portion of the upper insulator, such that the drain housing is between the upper insulator and the middle insulator, the middle insulator including a fixing portion to which the drain housing is fixed.
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| | ===STEEL SHEET, REFRIGERATOR INCLUDING THE SAME, AND MANUFACTURING METHOD OF STEEL SHEET ([[US Patent Application 18217792. STEEL SHEET, REFRIGERATOR INCLUDING THE SAME, AND MANUFACTURING METHOD OF STEEL SHEET simplified abstract|18217792]])=== | | ===STEEL SHEET, REFRIGERATOR INCLUDING THE SAME, AND MANUFACTURING METHOD OF STEEL SHEET ([[US Patent Application 18217792. STEEL SHEET, REFRIGERATOR INCLUDING THE SAME, AND MANUFACTURING METHOD OF STEEL SHEET simplified abstract|18217792]])=== |
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| | Choongkeon KIM | | Choongkeon KIM |
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| − | '''Brief explanation'''
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| − | The abstract describes a steel sheet used on the outer surface of a refrigerator body. The steel sheet has reduced visibility of the curvature of the surface by lowering the glossiness on the sides. The refrigerator includes the body and a door that is attached to the body. The body consists of a base steel sheet, a base coating layer with a specific amount of silica, and a clear coating layer with silica and beads. The abstract also mentions a manufacturing method for the steel sheet.
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| − | '''Abstract'''
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| − | Provided is a steel sheet having lowered visibility of the curvature of the outer surface by lowering the side glossiness of the steel sheet used on a refrigerator body, a refrigerator comprising same, and a manufacturing method of the steel sheet. The refrigerator includes: the body; and a door rotatably coupled to the body. The body includes: a base steel sheet, a base coating layer provided on the base steel sheet and comprising 2.5 to 4.0 weight % of silica relative to the total weight of the base coating layer, and a clear coating layer provided on the base coating layer and comprising silica and 2.0 to 5.0 weight % of beads relative to the total weight of the clear coating layer.
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| | ===ELECTRONIC DEVICE AND METHOD OF MEASURING AIR TEMPERATURE USING THE SAME ([[US Patent Application 17901265. ELECTRONIC DEVICE AND METHOD OF MEASURING AIR TEMPERATURE USING THE SAME simplified abstract|17901265]])=== | | ===ELECTRONIC DEVICE AND METHOD OF MEASURING AIR TEMPERATURE USING THE SAME ([[US Patent Application 17901265. ELECTRONIC DEVICE AND METHOD OF MEASURING AIR TEMPERATURE USING THE SAME simplified abstract|17901265]])=== |
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| | So Young Lee | | So Young Lee |
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| − | '''Brief explanation'''
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| − | This abstract describes an electronic device that has two temperature sensors inside it. One sensor is closer to the surface of the device than the other. The device also has a processor that can estimate the heat generated by a user's body based on the temperature difference between the two sensors. It can also measure the air temperature using this estimated heat flux and the temperature measured by the second sensor.
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| − | '''Abstract'''
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| − | An electronic device may include: a main body including a first surface and a second surface; a first temperature sensor and a second temperature sensor which are provided inside the main body, wherein the second temperature sensor is disposed closer to the surface of the main body than the first temperature sensor; and a processor, which while the second surface of the main body is in contact with a body part of a user, is configured to estimate a heat flux that is generated by body heat, of the user based on a difference between a first temperature measured by the first temperature sensor and a second temperature measured by the second temperature sensor, and measure air temperature based on the estimated heat flux and the second temperature.
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| | ===IMAGING DEVICE ([[US Patent Application 18342938. IMAGING DEVICE simplified abstract|18342938]])=== | | ===IMAGING DEVICE ([[US Patent Application 18342938. IMAGING DEVICE simplified abstract|18342938]])=== |
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| | KYUHWAN CHOI | | KYUHWAN CHOI |
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| − | '''Brief explanation'''
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| − | The abstract describes a device that can produce zoomed images at different magnifications by changing the effective focal length. This is achieved using a multi-layer optical system that includes an active imaging array with an active imaging lens.
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| − | '''Abstract'''
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| − | An imaging device may generate a zoom image corresponding to a plurality of magnifications by adjusting an effective focal length through a multi-layer optical system including an active imaging array having an active imaging lens.
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| | ===META OPTICAL DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME ([[US Patent Application 18343167. META OPTICAL DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME simplified abstract|18343167]])=== | | ===META OPTICAL DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME ([[US Patent Application 18343167. META OPTICAL DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME simplified abstract|18343167]])=== |
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| | Sangeun MUN | | Sangeun MUN |
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| − | '''Brief explanation'''
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| − | The abstract describes a device that can manipulate the phase of light using nanostructures. The device consists of multiple areas, each with its own set of rules for shaping and arranging the nanostructures. There is also a compensation area between each adjacent pair of areas, which helps to maintain a consistent refractive index change. The device can have any number of phase modulation areas, and each area is assigned a natural number. The abstract does not provide a title.
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| − | '''Abstract'''
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| − | A meta-optical device includes a plurality of phase modulation areas configured to modulate a phase of an incident light, each of the plurality of phase modulation areas including a plurality of nanostructures having a shape and an arrangement that are determined according to a respective rule set for each of the plurality of phase modulation areas; and a compensation area located between a kphase modulation area and a (k+1)phase modulation area adjacent to each other, from among the plurality of phase modulation areas, and including a compensation structure for buffering an effective refractive index change occurring in a boundary area between the kphase modulation area and the (k+1)phase modulation area according to respective rules of the kphase modulation area and the (k+1)phase modulation area, wherein N is a number of the plurality of phase modulation areas, k and N are natural numbers, and k is equal to or greater than 1 and less than N.
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| | ===RESIST COMPOUND AND METHOD OF FORMING PATTERN USING THE SAME ([[US Patent Application 18106254. RESIST COMPOUND AND METHOD OF FORMING PATTERN USING THE SAME simplified abstract|18106254]])=== | | ===RESIST COMPOUND AND METHOD OF FORMING PATTERN USING THE SAME ([[US Patent Application 18106254. RESIST COMPOUND AND METHOD OF FORMING PATTERN USING THE SAME simplified abstract|18106254]])=== |
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| | HOYOUNG KIM | | HOYOUNG KIM |
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| − | '''Brief explanation'''
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| − | The abstract states that there is a compound called resist, which is represented by Formula 1. It does not provide any further information about the compound or its properties.
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| − | '''Abstract'''
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| − | A resist compound is represented by Formula 1:
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| | ===FLEXIBLE DEVICES AND RELATED METHODS OF USE ([[US Patent Application 18214696. FLEXIBLE DEVICES AND RELATED METHODS OF USE simplified abstract|18214696]])=== | | ===FLEXIBLE DEVICES AND RELATED METHODS OF USE ([[US Patent Application 18214696. FLEXIBLE DEVICES AND RELATED METHODS OF USE simplified abstract|18214696]])=== |
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| | Saar SHAI | | Saar SHAI |
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| − | '''Brief explanation'''
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| − | The abstract describes devices that have flexible display sheets or other flexible elements, which can be physically manipulated to interact with the device. The flexibility of these elements allows for various methods of interaction, including manipulating specific flexible sections. The abstract also mentions the existence of units that can connect to these flexible display sheets to further facilitate interaction.
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| − | '''Abstract'''
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| − | Disclosed are devices which include flexible display sheets or other flexible elements, whereas by physically manipulating said flexible display sheets or elements, interaction with said device may be facilitated. Flexibility features may be employed to provide methods of interaction which include manipulating flexible section. Some of said methods of interaction are disclosed. Further disclosed are units which can connect to flexible display sheets, for interacting with said flexible display sheets.
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| | ===FLEXIBLE DISPLAY PANEL AND ELECTRONIC DEVICE ([[US Patent Application 18175962. FLEXIBLE DISPLAY PANEL AND ELECTRONIC DEVICE simplified abstract|18175962]])=== | | ===FLEXIBLE DISPLAY PANEL AND ELECTRONIC DEVICE ([[US Patent Application 18175962. FLEXIBLE DISPLAY PANEL AND ELECTRONIC DEVICE simplified abstract|18175962]])=== |
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| | Gae Hwang LEE | | Gae Hwang LEE |
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| − | '''Brief explanation'''
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| − | The abstract describes a flexible display panel and an electronic device that uses this panel. The panel can be folded, bent, or rolled along at least one axis. It consists of a substrate with both stretchable and non-stretchable regions, as well as multiple pixel circuits and unit elements arranged on the substrate. Each pixel circuit contains several thin film transistors, including a first one located on the stretchable region of the substrate. The channel length direction of this first transistor is parallel to the flexible direction of the display panel.
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| − | '''Abstract'''
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| − | Provided are a flexible display panel and an electronic device including the same, in the flexible display panel that is foldable, bendable, or rollable along at least one axis extending in a first direction, the flexible display panel including a substrate including a stretchable region and a non-stretchable region, a plurality of pixel circuits repeatedly arranged on the substrate, and a unit element array including unit elements repeatedly arranged on the substrate and electrically connected to each of the pixel circuits, wherein each of the pixel circuits includes a plurality of thin film transistors, the plurality of thin film transistors include a first thin film transistor on the stretchable region of the substrate, and a channel length direction of the first thin film transistor is substantially parallel to the first direction flexible display panel.
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| | ===ELECTRONIC DEVICE AND METHOD FOR CONFIGURING LAYOUT ON BASIS OF FOLDING STATE OF ELECTRONIC DEVICE ([[US Patent Application 18347136. ELECTRONIC DEVICE AND METHOD FOR CONFIGURING LAYOUT ON BASIS OF FOLDING STATE OF ELECTRONIC DEVICE simplified abstract|18347136]])=== | | ===ELECTRONIC DEVICE AND METHOD FOR CONFIGURING LAYOUT ON BASIS OF FOLDING STATE OF ELECTRONIC DEVICE ([[US Patent Application 18347136. ELECTRONIC DEVICE AND METHOD FOR CONFIGURING LAYOUT ON BASIS OF FOLDING STATE OF ELECTRONIC DEVICE simplified abstract|18347136]])=== |
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| | Seungeun LEE | | Seungeun LEE |
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| − | '''Brief explanation'''
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| − | This abstract describes a processor that is designed to detect when an electronic device with a flexible display is switched between folded and unfolded states. When this switch is detected, the processor uses a sensor circuit to gather information about the device's history and attributes, as well as the characteristics of the flexible display. Based on this information, the processor then arranges the screens of multiple applications in a layout that is suitable for the switched folding state. Finally, the processor displays these arranged screens on the device's flexible display.
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| − | '''Abstract'''
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| − | A processor is provided. The processor is configured to on the basis of detecting a switch of a folding sate of an electronic device through a sensor circuit, identify history information and/or attribute information related to each of a plurality of applications and a characteristic of a flexible display to be activated, configure a layout for arrangement of screens of the plurality of applications in a switched folding state, and arrange and display the screens of the plurality of applications on the basis of the configured layout.
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| | ===ELECTRONIC DEVICE INCLUDING TOUCH SENSOR INTEGRATED DISPLAY ([[US Patent Application 18345079. ELECTRONIC DEVICE INCLUDING TOUCH SENSOR INTEGRATED DISPLAY simplified abstract|18345079]])=== | | ===ELECTRONIC DEVICE INCLUDING TOUCH SENSOR INTEGRATED DISPLAY ([[US Patent Application 18345079. ELECTRONIC DEVICE INCLUDING TOUCH SENSOR INTEGRATED DISPLAY simplified abstract|18345079]])=== |
| Line 260: |
Line 185: |
| | Minuk KIM | | Minuk KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that has a display panel with pixels that emit light. There is a window above the display panel that allows the emitted light to pass through. The display panel includes organic light emitting elements, a thin film encapsulation layer, color filters, and light blocking portions. The device also includes first touch electrodes between the light blocking portions and the encapsulation layer, and second touch electrodes between the encapsulation layer and the window.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An electronic device may include a display panel that displays an image through pixels and a window located above the display panel and through which light emitted from the display panel is transmitted. The display panel may include a light emitting area including the plurality of pixels; a plurality of organic light emitting elements located in the light emitting area to form the plurality of pixels; a thin film encapsulation layer covering the plurality of organic light emitting elements; a plurality of color filters arranged to overlap with the plurality of organic light emitting elements; and a plurality of light blocking portions located between the color filters to block the light. A plurality of first touch electrodes disposed between the plurality of light blocking portions and the thin film encapsulation layer and a plurality of second touch electrodes disposed between the thin film encapsulation layer and the window may be included.
| |
| | | | |
| | ===METHOD AND ELECTRONIC DEVICE FOR PROVIDING CONTROL FUNCTIONALITY OF DISPLAY ([[US Patent Application 18217229. METHOD AND ELECTRONIC DEVICE FOR PROVIDING CONTROL FUNCTIONALITY OF DISPLAY simplified abstract|18217229]])=== | | ===METHOD AND ELECTRONIC DEVICE FOR PROVIDING CONTROL FUNCTIONALITY OF DISPLAY ([[US Patent Application 18217229. METHOD AND ELECTRONIC DEVICE FOR PROVIDING CONTROL FUNCTIONALITY OF DISPLAY simplified abstract|18217229]])=== |
| Line 274: |
Line 193: |
| | Choice CHOUDHARY | | Choice CHOUDHARY |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for controlling the functionality of a display on an electronic device. The method involves determining an event and dividing the rear side of the device into dynamic tiles based on various parameters associated with the display. The device then detects a user gesture on one of these tiles and classifies it into a gesture category. Based on the gesture and its category, the device determines a functionality and controls it on the display.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Embodiments are directed to providing control functionality of a display of an electronic device. The method includes determining, by the electronic device, an event and partitioning, by the electronic device, a rear side of the electronic device into dynamic tiles based on multiple parameters associated with the display, based on determining the event. The method also includes detecting, by the electronic device, a user gesture on the dynamic tile on the rear side of the electronic device and classifying, by the electronic device, the detected gesture into a gesture category. Further, the method includes determining, by the electronic device, a functionality based on the gesture on the rear side of the electronic device and the corresponding gesture category. The method includes controlling, by the electronic device, the functionality on the display of the electronic device.
| |
| | | | |
| | ===UNIVERSAL FLASH STORAGE (UFS) DEVICE AND METHOD OF WRITING DATA TO A RELAY PROTECTED MEMORY BLOCK (RPMB) REGION OF A UFS ([[US Patent Application 18217736. UNIVERSAL FLASH STORAGE (UFS) DEVICE AND METHOD OF WRITING DATA TO A RELAY PROTECTED MEMORY BLOCK (RPMB) REGION OF A UFS simplified abstract|18217736]])=== | | ===UNIVERSAL FLASH STORAGE (UFS) DEVICE AND METHOD OF WRITING DATA TO A RELAY PROTECTED MEMORY BLOCK (RPMB) REGION OF A UFS ([[US Patent Application 18217736. UNIVERSAL FLASH STORAGE (UFS) DEVICE AND METHOD OF WRITING DATA TO A RELAY PROTECTED MEMORY BLOCK (RPMB) REGION OF A UFS simplified abstract|18217736]])=== |
| Line 288: |
Line 201: |
| | Hyunsook HONG | | Hyunsook HONG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for securely writing data to a protected region in response to a request from a host. The method involves receiving a write request from the host, which includes a message authentication code and a random number. The write request is then verified based on a write count, the random number, and the message authentication code. The write count is updated based on the verification result. A device message authentication code is generated using the updated write count and the random number. Finally, a response is provided to the host, which includes the device message authentication code and the result of the verification of the write request.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method of writing data to a protected region in response to a request from a host includes receiving a first write request including a first host message authentication code and a first random number from the host, verifying the first write request based on a write count, the first random number, and the first host message authentication code, updating the write count based on a result of verifying the first write request, generating a first device message authentication code based on the updated write count and the first random number, and providing the host with a first response including the first device message authentication code and a result of the verifying of the first write request.
| |
| | | | |
| | ===SYSTEMS, METHODS, AND APPARATUS FOR SELECTING DEVICES IN TIERED MEMORY ([[US Patent Application 17840587. SYSTEMS, METHODS, AND APPARATUS FOR SELECTING DEVICES IN TIERED MEMORY simplified abstract|17840587]])=== | | ===SYSTEMS, METHODS, AND APPARATUS FOR SELECTING DEVICES IN TIERED MEMORY ([[US Patent Application 17840587. SYSTEMS, METHODS, AND APPARATUS FOR SELECTING DEVICES IN TIERED MEMORY simplified abstract|17840587]])=== |
| Line 302: |
Line 209: |
| | Jongmin GIM | | Jongmin GIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for selecting and allocating memory pages in a memory tier that consists of two memory devices. The selection process is based on the parameters of each device, with the first memory device having a first parameter and the second memory device having a second parameter. The method involves determining a first result by combining the first parameter with a first weight, which includes a scale factor. The second result is determined based on the second parameter. These results are then compared to make the selection. Finally, the memory page is allocated from the selected first memory device based on the received request.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method may include receiving a request for a memory page in a memory tier comprising a first memory device and a second memory device, wherein the first memory device has a first parameter and the second memory device has a second parameter, selecting, based on the first parameter and the second parameter, the first memory device, and allocating, based on the request, based on the selecting, the memory page from the first memory device. The selecting may include determining a first result based on the first parameter, determining a second result based on the second parameter, and comparing the first result and the second result. The determining the first result may include combining the first parameter with a first weight. The first weight may include a first scale factor, and the combining the first parameter with the first weight may include multiplying the first parameter and the first scale factor.
| |
| | | | |
| | ===MEMORY SYSTEM FOR OPTIMIZING ON-DIE TERMINATION SETTINGS OF MULTI-RANKS, METHOD OF OPERATION OF MEMORY SYSTEM, AND MEMORY CONTROLLER ([[US Patent Application 18304813. MEMORY SYSTEM FOR OPTIMIZING ON-DIE TERMINATION SETTINGS OF MULTI-RANKS, METHOD OF OPERATION OF MEMORY SYSTEM, AND MEMORY CONTROLLER simplified abstract|18304813]])=== | | ===MEMORY SYSTEM FOR OPTIMIZING ON-DIE TERMINATION SETTINGS OF MULTI-RANKS, METHOD OF OPERATION OF MEMORY SYSTEM, AND MEMORY CONTROLLER ([[US Patent Application 18304813. MEMORY SYSTEM FOR OPTIMIZING ON-DIE TERMINATION SETTINGS OF MULTI-RANKS, METHOD OF OPERATION OF MEMORY SYSTEM, AND MEMORY CONTROLLER simplified abstract|18304813]])=== |
| Line 316: |
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| | Youngdo Um | | Youngdo Um |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a memory system that consists of a host system and a memory device. The memory controller in the host system controls read or write operations for multiple memory ranks based on target or non-target information. The memory device has a storage that stores on-die termination (ODT) information for the memory ranks. The memory controller determines a target rank to be read or written and sends this information to the memory device. The memory device compares the ODT information with the target or non-target information received from the memory controller and adjusts the ODT value of the target rank based on the result of the comparison.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Provided is a memory system including a host system including a memory controller configured to control a read or write operation for a plurality of memory ranks, based on target or non-target information for the plurality of memory ranks, and a memory device including a storage configured to store on-die termination (ODT) information of the memory ranks. Here, the memory controller is further configured to determine a target rank to be read or written, and transmit information about the determined target rank, to the memory device, and the memory device is further configured to perform a comparison of the ODT information of the memory ranks stored in the storage with target or non-target information received from the memory controller, and change an ODT value of the target rank, based on target information received from the memory controller based on a result of the comparison.
| |
| | | | |
| | ===MEMORY EXPANDER, HETEROGENEOUS COMPUTING DEVICE USING MEMORY EXPANDER, AND OPERATION METHOD OF HETEROGENOUS COMPUTING ([[US Patent Application 18344837. MEMORY EXPANDER, HETEROGENEOUS COMPUTING DEVICE USING MEMORY EXPANDER, AND OPERATION METHOD OF HETEROGENOUS COMPUTING simplified abstract|18344837]])=== | | ===MEMORY EXPANDER, HETEROGENEOUS COMPUTING DEVICE USING MEMORY EXPANDER, AND OPERATION METHOD OF HETEROGENOUS COMPUTING ([[US Patent Application 18344837. MEMORY EXPANDER, HETEROGENEOUS COMPUTING DEVICE USING MEMORY EXPANDER, AND OPERATION METHOD OF HETEROGENOUS COMPUTING simplified abstract|18344837]])=== |
| Line 330: |
Line 225: |
| | Chon Yong Lee | | Chon Yong Lee |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a memory expander that has a memory device and a controller. The memory device stores different task data, while the controller manages the memory device. The controller can receive instructions and information from a central processing unit (CPU) through a compute express link (CXL) interface. When operating in a management mode, the controller can receive a read request and an address from an accelerator through the CXL interface. It then uses the metadata provided to transmit the appropriate task data from the memory device to the accelerator in response to the read request.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A memory expander includes a memory device that stores a plurality of task data. A controller controls the memory device. The controller receives metadata and a management request from an external central processing unit (CPU) through a compute express link (CXL) interface and operates in a management mode in response to the management request. In the management mode, the controller receives a read request and a first address from an accelerator through the CXL interface and transmits one of the plurality of task data to the accelerator based on the metadata in response to the read request.
| |
| | | | |
| | ===ELECTRONIC DEVICE AND METHOD FOR OPERATION OF STORAGE OF ELECTRONIC DEVICE ([[US Patent Application 18347197. ELECTRONIC DEVICE AND METHOD FOR OPERATION OF STORAGE OF ELECTRONIC DEVICE simplified abstract|18347197]])=== | | ===ELECTRONIC DEVICE AND METHOD FOR OPERATION OF STORAGE OF ELECTRONIC DEVICE ([[US Patent Application 18347197. ELECTRONIC DEVICE AND METHOD FOR OPERATION OF STORAGE OF ELECTRONIC DEVICE simplified abstract|18347197]])=== |
| Line 344: |
Line 233: |
| | Hyeongjun KIM | | Hyeongjun KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that includes a storage and a processor. The device has a storage device manager function that checks the free space on a file system. If the free space is less than or equal to a certain ratio, the device selects and compresses data with a low frequency of use. The compressed data is then managed using a list, and a block of the file system is reserved and processed for the compressed data.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An electronic device is provided. The electronic device includes a storage, and a processor configured to execute a storage device manager function, when the storage device manager function is executed, check a free space on a file system, as a result of the checking of the free space, determine whether the free space of the storage is less than or equal to a first reference ratio, when the free space of the storage is less than or equal to the first reference ratio, select and compress data having a use frequency less than or equal to a predetermined use frequency, manage the compressed data by using a list, and reserve and process a block secured by the compression on the file system.
| |
| | | | |
| | ===NONVOLATILE MEMORY DEVICE SUPPORTING HIGH-EFFICIENCY I/O INTERFACE ([[US Patent Application 18217063. NONVOLATILE MEMORY DEVICE SUPPORTING HIGH-EFFICIENCY I/O INTERFACE simplified abstract|18217063]])=== | | ===NONVOLATILE MEMORY DEVICE SUPPORTING HIGH-EFFICIENCY I/O INTERFACE ([[US Patent Application 18217063. NONVOLATILE MEMORY DEVICE SUPPORTING HIGH-EFFICIENCY I/O INTERFACE simplified abstract|18217063]])=== |
| Line 358: |
Line 241: |
| | SEONKYOO LEE | | SEONKYOO LEE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a nonvolatile memory device that has multiple pins for receiving signals. It includes a memory cell array and a memory interface circuit. The memory interface circuit can operate in two modes. In the first mode, it obtains a command, an address, and data from the third signals. In the second mode, it obtains the command and the address from the first and second signals, and the data from the third signals.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A nonvolatile memory device includes a first pin that receives a first signal, a second pin that receives a second signal, third pins that receive third signals, a fourth pin that receives a write enable signal, a memory cell array, and a memory interface circuit that obtains a command, an address, and data from the third signals in a first mode and obtains the command and the address from the first signal and the second signal and the data from the third signals in a second mode. In the first mode, the memory interface circuit obtains the command from the third signals and obtains the address from the third signals. In the second mode, the memory interface circuit obtains the command from the first signal and the second signal and obtains the address from the first signal and the second signal.
| |
| | | | |
| | ===NEURAL PROCESSING UNIT, NEURAL PROCESSING SYSTEM, AND APPLICATION SYSTEM ([[US Patent Application 18342385. NEURAL PROCESSING UNIT, NEURAL PROCESSING SYSTEM, AND APPLICATION SYSTEM simplified abstract|18342385]])=== | | ===NEURAL PROCESSING UNIT, NEURAL PROCESSING SYSTEM, AND APPLICATION SYSTEM ([[US Patent Application 18342385. NEURAL PROCESSING UNIT, NEURAL PROCESSING SYSTEM, AND APPLICATION SYSTEM simplified abstract|18342385]])=== |
| Line 372: |
Line 249: |
| | Young Nam HWANG | | Young Nam HWANG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a neural processing unit that can perform various tasks, specifically focusing on a first neural network operation. The unit consists of a processing core that executes the neural network operation, a hardware block that can be reconfigured as a hardware core to perform specific tasks, and at least one processor that distributes a portion of the overall work to the hardware block based on the workload of the processing core.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Provided is a neural processing unit that performs application-work including a first neural network operation, the neural processing unit includes a first processing core configured to execute the first neural network operation, a hardware block reconfigurable as a hardware core configured to perform hardware block-work, and at least one processor configured to execute computer-readable instructions to distribute a part of the application-work as the hardware block-work to the hardware block based on a first workload of the first processing core.
| |
| | | | |
| | ===SYSTEMS, METHODS, AND APPARATUS TO IDENTIFY FUNCTIONS FOR COMPUTATIONAL DEVICES ([[US Patent Application 18218577. SYSTEMS, METHODS, AND APPARATUS TO IDENTIFY FUNCTIONS FOR COMPUTATIONAL DEVICES simplified abstract|18218577]])=== | | ===SYSTEMS, METHODS, AND APPARATUS TO IDENTIFY FUNCTIONS FOR COMPUTATIONAL DEVICES ([[US Patent Application 18218577. SYSTEMS, METHODS, AND APPARATUS TO IDENTIFY FUNCTIONS FOR COMPUTATIONAL DEVICES simplified abstract|18218577]])=== |
| Line 386: |
Line 257: |
| | Oscar P. PINTO | | Oscar P. PINTO |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an apparatus that includes a device with computational resources and a circuit. The device is capable of performing computational functions, and the circuit is designed to access these functions based on an identifier. The identifier contains protocol information for the computational function, including information on how to pass a parameter to the function. The parameter passing technique can involve passing the parameter with a command or using a reference to the parameter. The identifier also includes information to identify the specific functionality of the computational function.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An apparatus may include a device including at least one computational resource configured to perform a computational device function, and a circuit configured to access, based on an identifier, the computational device function, wherein the identifier may include protocol information for the computational device function. The protocol information may include information to pass a parameter. The information to pass the parameter may include information to pass a parameter to the computational device function. The information to pass the parameter may indicate a parameter passing technique. The parameter passing technique may include passing the parameter with a command. The parameter passing technique may include passing the parameter using a reference to the parameter. The identifier may include a first portion including at least a portion of the protocol information. The identifier may include a second portion including information to identify a functionality of the computational device function.
| |
| | | | |
| | ===SERVICE OPERATION METHOD AND ELECTRONIC DEVICE SUPPORTING SAME ([[US Patent Application 18343066. SERVICE OPERATION METHOD AND ELECTRONIC DEVICE SUPPORTING SAME simplified abstract|18343066]])=== | | ===SERVICE OPERATION METHOD AND ELECTRONIC DEVICE SUPPORTING SAME ([[US Patent Application 18343066. SERVICE OPERATION METHOD AND ELECTRONIC DEVICE SUPPORTING SAME simplified abstract|18343066]])=== |
| Line 400: |
Line 265: |
| | Kyungseok LEE | | Kyungseok LEE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that has a memory with an application and multiple services. The device also has a processor that can register a service in an inactive state, meaning it is not currently being used by the application but is being prepared for future use. The processor can execute an application using a different service and then check if that service is registered in the list of inactive services. If it is, the processor can switch the service from inactive to active, allowing it to be used by the application.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An electronic device including a memory including an application and a plurality of services, and a processor is provided. The processor is configured to register, in a first service among the plurality of services, a service other than the first service among the plurality of services, the service being registered in an inactive state preparing for execution by the application, wherein the first service includes a list in which the service in the inactive state is registered, execute a first application using a second service among the plurality of services, confirm whether the second service is registered in the list in response to a request for the second service of the first application, and switch the second service from the inactive state to an active state, in which the second service can be executed by the application, when it is confirmed that the second service is registered in the list.
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| | | | |
| | ===OPERATION METHOD OF AN ACCELERATOR AND SYSTEM INCLUDING THE SAME ([[US Patent Application 18212979. OPERATION METHOD OF AN ACCELERATOR AND SYSTEM INCLUDING THE SAME simplified abstract|18212979]])=== | | ===OPERATION METHOD OF AN ACCELERATOR AND SYSTEM INCLUDING THE SAME ([[US Patent Application 18212979. OPERATION METHOD OF AN ACCELERATOR AND SYSTEM INCLUDING THE SAME simplified abstract|18212979]])=== |
| Line 414: |
Line 273: |
| | Seung Wook LEE | | Seung Wook LEE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an accelerator and its operation method, as well as an accelerator system that includes the accelerator. The operation method involves receiving workloads assigned to the accelerator, determining the reuse data of these workloads based on hardware resource information and memory access cost, and providing the result of performing the workloads.
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| − |
| |
| − | '''Abstract'''
| |
| − | An accelerator, an operation method of the accelerator, and an accelerator system including the accelerator are disclosed. The operation method includes receiving one or more workloads assigned on an accelerator, determining reuse data of the workloads based on hardware resource information and/or a memory access cost of the accelerator when a plurality of processing units included in the accelerator performs the workloads, and providing a result of performing the workloads.
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| | | | |
| | ===NETWORK KEY VALUE INDEXING DESIGN ([[US Patent Application 18344114. NETWORK KEY VALUE INDEXING DESIGN simplified abstract|18344114]])=== | | ===NETWORK KEY VALUE INDEXING DESIGN ([[US Patent Application 18344114. NETWORK KEY VALUE INDEXING DESIGN simplified abstract|18344114]])=== |
| Line 428: |
Line 281: |
| | Somnath ROY | | Somnath ROY |
| | | | |
| − |
| |
| − | '''Brief explanation'''
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| − | The abstract describes a method for indexing in a network key value indexing system. It involves retrieving a key name from a storage device, parsing the key name into different components, determining these components based on a delimiter, and generating a hash table in a memory cache to associate the components with each other. This method helps in efficiently organizing and accessing data in the network key value indexing system.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Provided is a method of indexing in a network key value indexing system. The method includes retrieving a first key name from a storage device of the network key value indexing system, the first key name identifying a first prefix, a first bucket, and a first key, the first prefix indicating the first bucket, parsing the first key name into the first prefix, the first bucket, and the first key, determining the first prefix, the first bucket, and the first key based on a first delimiter, and generating a hash table in a memory cache of the network key value indexing system to associate the first prefix with the first key.
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| | | | |
| | ===METHOD AND APPARATUS FOR PREDICTING TIME-SERIES DATA ([[US Patent Application 18344187. METHOD AND APPARATUS FOR PREDICTING TIME-SERIES DATA simplified abstract|18344187]])=== | | ===METHOD AND APPARATUS FOR PREDICTING TIME-SERIES DATA ([[US Patent Application 18344187. METHOD AND APPARATUS FOR PREDICTING TIME-SERIES DATA simplified abstract|18344187]])=== |
| Line 442: |
Line 289: |
| | Jooyoo KIM | | Jooyoo KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for predicting future data in a time-series dataset. The method involves using a time-series model to process the input data and generate multiple predictions. The input data may contain invalid values, which are replaced with predetermined valid values before being used in the model. The output of the method is a set of prediction data, which can be equal to or greater than a predefined number of predictions.
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| − |
| |
| − | '''Abstract'''
| |
| − | A time-series data prediction method is provided. The method includes storing a time-series model, inputting time-series data to the time-series model, and outputting a plurality of pieces of prediction data which is a preset number of pieces of prediction data or more based on the time-series model. The inputting of the time-series data to the time-series model includes substituting invalid data included in the time-series data with preset valid data, and inputting the time-series data including the valid data to the time-series model.
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| | | | |
| | ===APPARATUS AND METHOD FOR AUTHENTICATING OBJECT IN ELECTRONIC DEVICE ([[US Patent Application 18201435. APPARATUS AND METHOD FOR AUTHENTICATING OBJECT IN ELECTRONIC DEVICE simplified abstract|18201435]])=== | | ===APPARATUS AND METHOD FOR AUTHENTICATING OBJECT IN ELECTRONIC DEVICE ([[US Patent Application 18201435. APPARATUS AND METHOD FOR AUTHENTICATING OBJECT IN ELECTRONIC DEVICE simplified abstract|18201435]])=== |
| Line 456: |
Line 297: |
| | Hyunkee MIN | | Hyunkee MIN |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that uses an antenna array and wireless communication module to form directional beams. The device scans different regions and receives reflected waves from an object. It then narrows down the scanning to smaller regions based on the received waves and authenticates the object based on the reflected waves.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | In accordance with an aspect of the disclosure, an electronic device is provided. The electronic device comprises an antenna array, a wireless communication module electrically connected to the antenna array and configured to form directional beams through the antenna array, at least one processor operatively connected to the wireless communication module; and a memory operatively connected to the at least one processor. The memory stores instructions causing the at least one processor to perform a plurality of operations comprising: transmitting a sequence of first directional beams having a first beam width to scan first regions having a first size through the antenna array, receiving a sequence of first reflected waves generated by reflection of the sequence of the first directional beams from an object through the antenna array, transmitting a sequence of second directional beams having a second beam width narrower than the first beam width to scan second regions, which are included in the first regions and have a second size smaller than the first size, through the antenna array based on at least a portion of the received sequence of the first reflected waves, receiving a sequence of second reflected waves generated by reflection of the sequence of the second directional beams from the object through the antenna array, and authenticating the object based on at least a portion of the sequence of the second reflected waves.
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| | | | |
| | ===SYSTEM AND METHOD FOR PROVIDING SECURITY PROTECTION FOR FPGA BASED SOLID STATE DRIVES ([[US Patent Application 18217808. SYSTEM AND METHOD FOR PROVIDING SECURITY PROTECTION FOR FPGA BASED SOLID STATE DRIVES simplified abstract|18217808]])=== | | ===SYSTEM AND METHOD FOR PROVIDING SECURITY PROTECTION FOR FPGA BASED SOLID STATE DRIVES ([[US Patent Application 18217808. SYSTEM AND METHOD FOR PROVIDING SECURITY PROTECTION FOR FPGA BASED SOLID STATE DRIVES simplified abstract|18217808]])=== |
| Line 470: |
Line 305: |
| | Sompong Paul Olarig | | Sompong Paul Olarig |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for providing security to a storage device. The storage device receives a public key and sends it along with a proposed configuration to a security manager. The security manager checks if the received public key matches its private key and downloads the proposed configuration to the storage device. It then verifies if the configuration was successfully downloaded and allows the storage device to operate according to the downloaded configuration. Finally, the security manager grants a request to lease the storage device operating in the downloaded configuration for a specific time period.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | According to some example embodiments, a method for providing security to a storage device includes receiving, by the storage device, a public key via a network; sending, by the storage device, the received public key and a proposed configuration corresponding to the storage device to a security manager that resides in a control plane of the network; determining, by the security manager, whether the public key received from the storage device matches a private key available to the security manager; downloading, by the security manager, the proposed configuration to the storage device; determining, by the security manager, if the proposed configuration is successfully downloaded to the storage device; operating the storage device according to the downloaded configuration; and granting, by the security manager, a request to lease the storage device operating in the downloaded configuration for a time interval.
| |
| | | | |
| | ===ELECTRONIC DEVICE AND METHOD FOR CONTROLLING SAME ([[US Patent Application 18216824. ELECTRONIC DEVICE AND METHOD FOR CONTROLLING SAME simplified abstract|18216824]])=== | | ===ELECTRONIC DEVICE AND METHOD FOR CONTROLLING SAME ([[US Patent Application 18216824. ELECTRONIC DEVICE AND METHOD FOR CONTROLLING SAME simplified abstract|18216824]])=== |
| Line 484: |
Line 313: |
| | Jijoong Moon | | Jijoong Moon |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device and a method for controlling it. The device has a memory and a processor. The memory stores a pre-trained neural network model and training data. The processor performs various operations on the neural network model and the training data.
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| − |
| |
| − | First, it calculates a measure called the "loss function" based on a label associated with the training data and the output data generated by feeding the training data into the neural network model.
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| − |
| |
| − | Next, it determines the amount of change in the weights of each layer in the neural network model based on the calculated loss function.
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| − |
| |
| − | Then, the processor updates the weights of at least one layer in the neural network model if the magnitude of the weight change exceeds a certain threshold value. However, it does not update the weights of other layers if the weight change is below the threshold value.
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| − |
| |
| − | In summary, the method involves training the neural network model by adjusting the weights of certain layers based on the calculated loss function, while leaving the weights of other layers unchanged if the change is not significant enough.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Disclosed are an electronic device including a memory and a processor, and a method for controlling same. The memory stores a pre-trained neural network model and training data. The processor obtains a first loss function based on a label corresponding to the training data and output data obtained by inputting the training data into the neural network model; obtains a size of a change amount of a weight of each of a plurality of layers included in the neural network model based on the first loss function, and trains the neural network model by updating a weight of at least one layer for which the magnitude of the change amount of the weight exceeds a first threshold value, while at least one other layer, among the plurality of layers, for which a size of the weight change amount does not exceed the first threshold value is not updated.
| |
| | | | |
| | ===METHOD AND ELECTRONIC DEVICE FOR SECURE TRAINING OF AN ARTIFICIAL INTELLIGENCE (AI) MODEL ([[US Patent Application 18303976. METHOD AND ELECTRONIC DEVICE FOR SECURE TRAINING OF AN ARTIFICIAL INTELLIGENCE (AI) MODEL simplified abstract|18303976]])=== | | ===METHOD AND ELECTRONIC DEVICE FOR SECURE TRAINING OF AN ARTIFICIAL INTELLIGENCE (AI) MODEL ([[US Patent Application 18303976. METHOD AND ELECTRONIC DEVICE FOR SECURE TRAINING OF AN ARTIFICIAL INTELLIGENCE (AI) MODEL simplified abstract|18303976]])=== |
| Line 506: |
Line 321: |
| | Aditya JHAWAR | | Aditya JHAWAR |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method and device for securely training an artificial intelligence (AI) model. The method involves selecting specific layers from a base AI model for secure training, while simultaneously training other layers in a non-secure mode. The trained layers are then combined to create the final AI model.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method and an electronic device for secure training of an artificial intelligence (AI) model are provided. The method includes determining, by the electronic device, a first set of layers from a base AI model for performing training in a secure mode, and determining, by the electronic device, a second set of layers other than the first set of layers in the base AI model, simultaneously training, by the electronic device, the first set of layers in the secure mode and the second set of layers in a non-secure mode, and generating, by the electronic device, the AI model by combining the trained first set of layers and the trained second set of layers in the secure mode.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR PERFORMING ANOMALY DETECTION USING NEURAL NETWORK ([[US Patent Application 18341996. METHOD AND APPARATUS FOR PERFORMING ANOMALY DETECTION USING NEURAL NETWORK simplified abstract|18341996]])=== | | ===METHOD AND APPARATUS FOR PERFORMING ANOMALY DETECTION USING NEURAL NETWORK ([[US Patent Application 18341996. METHOD AND APPARATUS FOR PERFORMING ANOMALY DETECTION USING NEURAL NETWORK simplified abstract|18341996]])=== |
| Line 520: |
Line 329: |
| | Hyunsoo KIM | | Hyunsoo KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method and device that use a neural network to detect anomalies. The device extracts input features from a data signal, processes them through the neural network to obtain output features, calculates an error based on the input and output features, and determines if the input data signal is abnormal by comparing the error to a threshold.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method and apparatus for performing anomaly detection by using a neural network are provided. The apparatus is configured to extract input features of an input data signal, obtain output features of the neural network by processing the input features through the neural network, obtain an error based on the input features and the output features, and determine whether the input data signal indicates an abnormal signal based on the error and a threshold.
| |
| | | | |
| | ===SUPER-RESOLUTION RECONSTRUCTION METHOD AND APPARATUS FOR ADAPTIVE STREAMING MEDIA AND SERVER ([[US Patent Application 18129534. SUPER-RESOLUTION RECONSTRUCTION METHOD AND APPARATUS FOR ADAPTIVE STREAMING MEDIA AND SERVER simplified abstract|18129534]])=== | | ===SUPER-RESOLUTION RECONSTRUCTION METHOD AND APPARATUS FOR ADAPTIVE STREAMING MEDIA AND SERVER ([[US Patent Application 18129534. SUPER-RESOLUTION RECONSTRUCTION METHOD AND APPARATUS FOR ADAPTIVE STREAMING MEDIA AND SERVER simplified abstract|18129534]])=== |
| Line 534: |
Line 337: |
| | Ling ZHANG | | Ling ZHANG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for improving the quality of streaming media over a network. It involves streaming media to a device at a lower resolution, identifying this resolution, and acquiring a neural network model that can enhance the resolution. The media is then reconstructed at a higher resolution using this model and played on the device. The neural network model is trained in advance using media at the lower resolution as input and media at the higher resolution as the desired outcome.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A super-resolution reconstruction method for adaptive streaming of media over a network includes streaming an instance of streamable media to a terminal device via the network, identifying a streaming resolution of the instance of the streamable media based on the streaming resolution being less than a first target super-resolution, acquiring, by the terminal device from a server of the network, a first target super-resolution neural network model corresponding to the identified streaming resolution and the first target super-resolution, reconstructing the instance of the streamable media streamed to the terminal device into an instance of the streamable media at the first target super-resolution using the first target super-resolution neural network model and playing the reconstructed instance of the streamable media by the terminal device, wherein the first target super-resolution neural network model is obtained by performing model training in advance by taking a media at the identified streaming resolution as an input and taking a media at the first target super-resolution as a learning objective.
| |
| | | | |
| | ===METHOD AND DEVICE FOR LIGHT ESTIMATION ([[US Patent Application 17971049. METHOD AND DEVICE FOR LIGHT ESTIMATION simplified abstract|17971049]])=== | | ===METHOD AND DEVICE FOR LIGHT ESTIMATION ([[US Patent Application 17971049. METHOD AND DEVICE FOR LIGHT ESTIMATION simplified abstract|17971049]])=== |
| Line 548: |
Line 345: |
| | INWOO HA | | INWOO HA |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method and device that can estimate light conditions in a given environment. The method involves capturing an image of a reference object and using it to generate a reference image. A background image is then generated by capturing the real background with a different image signal processing setting. The light information corresponding to the background image is estimated using a light estimation model. A virtual object image is rendered based on this light information and the reference object. The light estimation model is trained by comparing the reference image with the virtual object image.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method and device with light estimation are provided. A method performed by an electronic device includes generating a reference image based on image data acquired by capturing a reference object and based on a first image signal processing (ISP) setting, generating a background image based on raw image data acquired by capturing a real background in which the reference object is positioned and based on a second ISP setting, estimating light information corresponding to the background image using a light estimation model, rendering a virtual object image corresponding to the light information and the reference object, and training the light estimation model based on a difference between the reference image and the virtual object image.
| |
| | | | |
| | ===ELECTRONIC DEVICE FOR PROCESSING IMAGE, AND OPERATION METHOD OF ELECTRONIC DEVICE ([[US Patent Application 18137266. ELECTRONIC DEVICE FOR PROCESSING IMAGE, AND OPERATION METHOD OF ELECTRONIC DEVICE simplified abstract|18137266]])=== | | ===ELECTRONIC DEVICE FOR PROCESSING IMAGE, AND OPERATION METHOD OF ELECTRONIC DEVICE ([[US Patent Application 18137266. ELECTRONIC DEVICE FOR PROCESSING IMAGE, AND OPERATION METHOD OF ELECTRONIC DEVICE simplified abstract|18137266]])=== |
| Line 562: |
Line 353: |
| | Isak CHOI | | Isak CHOI |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method that uses artificial intelligence models to analyze images of objects with non-flat surfaces. The method identifies the surface of interest, determines the 3D shape type of the object, and calculates a set of values related to the object's 3D parameters. Using these values, the method estimates the non-flat shape of the surface and then applies a perspective transformation to create a flattened image of the surface.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method includes: obtaining a first image of an object including a surface having a non-flat shape; identifying a region corresponding to the surface as a region of interest by applying the first image to a first artificial intelligence model; obtaining data about a three-dimensional (3D) shape type of the object by applying the first image to a second AI model; obtaining a set of values of a 3D parameter related to the object, the surface, or the first camera, based on the region and the data; estimating the non-flat shape of the surface, based on the set of values of the 3D parameter; and obtaining a flat surface image in which the non-flat shape of the surface is flattened, by performing a perspective transformation on the surface.
| |
| | | | |
| | ===FAULT DETECTION DISPLAY APPARATUS AND OPERATION METHOD THEREOF ([[US Patent Application 18212981. FAULT DETECTION DISPLAY APPARATUS AND OPERATION METHOD THEREOF simplified abstract|18212981]])=== | | ===FAULT DETECTION DISPLAY APPARATUS AND OPERATION METHOD THEREOF ([[US Patent Application 18212981. FAULT DETECTION DISPLAY APPARATUS AND OPERATION METHOD THEREOF simplified abstract|18212981]])=== |
| Line 576: |
Line 361: |
| | YILHO LEE | | YILHO LEE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an integrated circuit panel that is capable of detecting faults in a driving circuit. The panel includes a driving circuit array with two driving circuits, a data driver that outputs input data signals through data lines, a switch driver that outputs a switching signal through a switch line, and an error detection driver that receives output data signals through test lines. When the switching signal is received, the driving circuits output output data signals based on the input data signals through the test lines. The error detection driver then detects any faults in the driving circuits based on the output data signals.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Disclosed is integrated circuit panel which detects fault of a driving circuit. The integrated circuit panel includes: a driving circuit array including first and second driving circuits; a data driver configured to output first and second input data signals through first and second data lines, respectively; a switch driver configured to output a switching signal through a switch line; and an error detection driver configured to receive first and second output data signals through first and second test lines, respectively, wherein, in response to the switching signal, the first and second driving circuits are configured to output the first and second output data signals, which are based on the first and second input data signal, through the first and second test lines, respectively, and the error detection driver is configured to detect a fault of the first or second driving circuit based on the first or second output data signal.
| |
| | | | |
| | ===ELECTRONIC DEVICE AND CONTROL METHOD THEREOF ([[US Patent Application 18344020. ELECTRONIC DEVICE AND CONTROL METHOD THEREOF simplified abstract|18344020]])=== | | ===ELECTRONIC DEVICE AND CONTROL METHOD THEREOF ([[US Patent Application 18344020. ELECTRONIC DEVICE AND CONTROL METHOD THEREOF simplified abstract|18344020]])=== |
| Line 590: |
Line 369: |
| | Minwoo LEE | | Minwoo LEE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that includes a display panel, a display driver IC (DDI), and a processor. The display panel is used to show a screen, and the DDI supplies a data voltage to the display panel to display the screen. The processor transmits image data to the DDI to set the data voltage. The DDI generates a synchronization signal to control when the data voltage is supplied to the display panel and sends this signal to the processor. The processor selects a specific time within a waiting period of the synchronization signal to start transmitting the image data.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An example electronic device includes a display panel configured to display a screen, a display driver IC (DDI) configured to supply a data voltage for displaying the screen to the display panel, and a processor configured to transmit image data for setting the data voltage to the DDI. The DDI is configured to generate a synchronization signal for controlling a time point at which the data voltage is supplied to the display panel, and to deliver the synchronization signal to the processor. The processor is configured to select a time point, at which the image data starts to be transmitted, within a waiting period of the synchronization signal.
| |
| | | | |
| | ===ELECTRONIC DEVICE AND METHOD FOR OPERATING HIGH SPEED SCREEN OF ELECTRONIC DEVICE ([[US Patent Application 18214560. ELECTRONIC DEVICE AND METHOD FOR OPERATING HIGH SPEED SCREEN OF ELECTRONIC DEVICE simplified abstract|18214560]])=== | | ===ELECTRONIC DEVICE AND METHOD FOR OPERATING HIGH SPEED SCREEN OF ELECTRONIC DEVICE ([[US Patent Application 18214560. ELECTRONIC DEVICE AND METHOD FOR OPERATING HIGH SPEED SCREEN OF ELECTRONIC DEVICE simplified abstract|18214560]])=== |
| Line 604: |
Line 377: |
| | Gyehun JEON | | Gyehun JEON |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that has a display and a processor. The device can run applications and receive frequency events from them. Based on the application being used, the device can determine specific settings and refresh rates for the display. It can also gather information about the state of the device and use that, along with the determined refresh rate, to control a high-speed screen. This allows for efficient and optimized display of the application on the device.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An electronic device may include: a display configured to display an execution screen of an application, and a processor operatively connected to the display. The processor is configured to: execute the application; receive a frequency event from the application; identify predetermined settings based on the application being executed; determine, based on the frequency event and the predetermined settings, a refresh rate of an execution screen of the application; identify, based on state information of the electronic device and the determined refresh rate, information for controlling operation of a high speed screen; and controlling, based on the identified information, the high speed screen related to the execution screen of the application on the display.
| |
| | | | |
| | ===IMAGE PROCESSING METHOD AND ELECTRONIC DEVICE SUPPORTING SAME ([[US Patent Application 18342577. IMAGE PROCESSING METHOD AND ELECTRONIC DEVICE SUPPORTING SAME simplified abstract|18342577]])=== | | ===IMAGE PROCESSING METHOD AND ELECTRONIC DEVICE SUPPORTING SAME ([[US Patent Application 18342577. IMAGE PROCESSING METHOD AND ELECTRONIC DEVICE SUPPORTING SAME simplified abstract|18342577]])=== |
| Line 618: |
Line 385: |
| | Kyuwon KIM | | Kyuwon KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an image processing method and an electronic device that supports it. The electronic device has a display and a processor. The processor is designed to perform the following tasks:
| |
| − | 1. Identify a specific section in the first media data, which includes both video and audio data.
| |
| − | 2. Identify a second section in the second media data, based on either the audio data or the similarity to an object in the first image.
| |
| − | 3. Display a screen on the device's display that shows the playback of content, including both the first and second sections.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An image processing method and/or an electronic device supporting same. The electronic device may include a display and a processor, wherein the processor may be configured to: identify a first playback section in first media data including first video data and first audio data; identify a second playback section, on the basis of at least one of second audio data and a degree of similarity to a first object included in a first image corresponding to an end point of the first playback section, in second media data including second video data and the second audio data; and display, on the display, a screen according to layback of content including the first playback section and the second playback section.
| |
| | | | |
| | ===MULTI STAGE CHARGE PUMP CIRCUITS AND SEMICONDUCTOR MEMORY DEVICES INCLUDING THE SAME ([[US Patent Application 18078456. MULTI STAGE CHARGE PUMP CIRCUITS AND SEMICONDUCTOR MEMORY DEVICES INCLUDING THE SAME simplified abstract|18078456]])=== | | ===MULTI STAGE CHARGE PUMP CIRCUITS AND SEMICONDUCTOR MEMORY DEVICES INCLUDING THE SAME ([[US Patent Application 18078456. MULTI STAGE CHARGE PUMP CIRCUITS AND SEMICONDUCTOR MEMORY DEVICES INCLUDING THE SAME simplified abstract|18078456]])=== |
| Line 635: |
Line 393: |
| | Jungkyun Oh | | Jungkyun Oh |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a charge pump circuit used in a semiconductor memory device. The circuit consists of two pumping stages and two transfer stages. The first pumping stage includes two capacitors, and the second pumping stage includes two additional capacitors. The first transfer stage transfers the voltage from the first pumping capacitor when the clock signal is high, and transfers the voltage from the second pumping capacitor when the inverse clock signal is high. Similarly, the second transfer stage transfers the voltage from the third pumping capacitor when the clock signal is high, and transfers the voltage from the fourth pumping capacitor when the inverse clock signal is high. The second transfer stage is capable of outputting a voltage that is multiple times the input voltage.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A charge pump circuit of a semiconductor memory device, which may include a first pumping stage that includes a first pumping capacitor and a second pumping capacitor, a first transfer stage that transfers a voltage of the first pumping capacitor when a clock signal is at a high level or transfers a voltage of the second pumping capacitor when a inverse clock signal is at the high level, a second pumping stage that includes a third pumping capacitor and a fourth pumping capacitor, and a second transfer stage that transfers a voltage of the third pumping capacitor when the clock signal is at the high level or transfers a voltage of the fourth pumping capacitor when the inverse clock signal is at the high level. The second transfer stage may output multiple times of the input voltage.
| |
| | | | |
| | ===QUADRATURE ERROR CORRECTION CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME ([[US Patent Application 18218243. QUADRATURE ERROR CORRECTION CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME simplified abstract|18218243]])=== | | ===QUADRATURE ERROR CORRECTION CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME ([[US Patent Application 18218243. QUADRATURE ERROR CORRECTION CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME simplified abstract|18218243]])=== |
| Line 649: |
Line 401: |
| | Hojun Yoon | | Hojun Yoon |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a circuit that corrects errors in the quadrature (phase and amplitude) of clock signals. It includes several components such as a duty cycle adjusting circuit, a phase interpolator, a phase detector, and a delay control circuit.
| |
| − |
| |
| − | The duty cycle adjusting circuit adjusts the skew (time difference) and duty cycle error of clock signals by delaying the edges of one clock signal and the falling edge of another clock signal. This adjustment is done based on control code sets.
| |
| − |
| |
| − | The phase interpolator generates a delayed and selected clock signal by delaying a selected clock signal from the adjusted signals.
| |
| − |
| |
| − | The phase detector detects the phase difference between two clock signals and generates an up/down signal.
| |
| − |
| |
| − | The delay control circuit generates control code sets based on the up/down signal, which are then used by the duty cycle adjusting circuit to make further adjustments.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A quadrature error correction circuit includes a duty cycle adjusting circuit, a phase interpolator, a phase detector, and a delay control circuit. The duty cycle adjusting circuit generates a first corrected clock signal and a second corrected clock signal whose skew and duty cycle error are concurrently adjusted by adjusting a delay of edges of a second clock signal and adjusting a delay of a falling edge of a first clock signal based on first through fourth control code sets. The phase interpolator generates a second delayed and selected clock signal by delaying a second selected clock signal selected from first through fourth adjusted clock signals. A phase detector detects a phase difference between a first selected clock signal and the second delayed and selected clock signal to generate an up/down signal. The delay control circuit generates the first through fourth control code sets based on the up/down signal.
| |
| | | | |
| | ===SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEMICONDUCTOR DIE, AND SEMICONDUCTOR DEVICES INCLUDING THE SAME ([[US Patent Application 18154945. SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEMICONDUCTOR DIE, AND SEMICONDUCTOR DEVICES INCLUDING THE SAME simplified abstract|18154945]])=== | | ===SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEMICONDUCTOR DIE, AND SEMICONDUCTOR DEVICES INCLUDING THE SAME ([[US Patent Application 18154945. SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEMICONDUCTOR DIE, AND SEMICONDUCTOR DEVICES INCLUDING THE SAME simplified abstract|18154945]])=== |
| Line 671: |
Line 409: |
| | TAEYOUNG OH | | TAEYOUNG OH |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor die that has two pins. The first pin is used to send a control signal to another semiconductor die, which has multiple circuits that respond to this control signal. The second pin is used to receive a control signal from the second semiconductor die, which has multiple circuits that respond to this control signal as well. In simpler terms, the semiconductor die has two pins for communication with another die, each controlling different circuits.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A semiconductor die includes a first pin configured to output a first on-die termination (ODT) control signal to a second semiconductor die, the second semiconductor die comprising a plurality of second ODT circuits each having an ODT that is responsive to the first ODT control signal; and a second pin configured to receive a second ODT control signal output from the second semiconductor die, the semiconductor die comprising a plurality of first ODT circuits each having an ODT that is responsive to the second ODT control signal.
| |
| | | | |
| | ===TIMELY DETECTION AND RESPONSE TO CONTEXT-SPECIFIC HEALTH EVENTS ([[US Patent Application 17728741. TIMELY DETECTION AND RESPONSE TO CONTEXT-SPECIFIC HEALTH EVENTS simplified abstract|17728741]])=== | | ===TIMELY DETECTION AND RESPONSE TO CONTEXT-SPECIFIC HEALTH EVENTS ([[US Patent Application 17728741. TIMELY DETECTION AND RESPONSE TO CONTEXT-SPECIFIC HEALTH EVENTS simplified abstract|17728741]])=== |
| Line 685: |
Line 417: |
| | Tousif Ahmed | | Tousif Ahmed |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for detecting and responding to adverse health events and emergencies. It involves using sensors on a device to collect data on the user's physical state. This data is used to update a profile of the user's current context. A baseline profile with the same context is then selected from a set of profiles with different contexts. The features of the current context profile are compared to the corresponding features of the baseline profile. If a possible adverse health event is detected, a remedial action is initiated.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Detecting an adverse health event and responding to an emergency event can include updating a current context profile of a user based on signals generated by one or more sensors of a device, the signals generated in response to one or more physically measurable phenomena associated with the user. A context-aware baseline profile having a same context as the current context profile can be selected, the context-aware baseline profile selected from a plurality of context-aware baseline profiles having different contexts. Features of the current context profile can be compared with corresponding features of the context-aware baseline profile of the user having the same context as the current context profile. A remedial action can be initiated in response to recognizing, based on the comparing, an occurrence of a possible adverse health event affecting the user.
| |
| | | | |
| | ===APPARATUS FOR CONDUCTING PLASMA SURFACE TREATMENT, BOARD TREATMENT SYSTEM HAVING THE SAME, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME ([[US Patent Application 18217043. APPARATUS FOR CONDUCTING PLASMA SURFACE TREATMENT, BOARD TREATMENT SYSTEM HAVING THE SAME, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME simplified abstract|18217043]])=== | | ===APPARATUS FOR CONDUCTING PLASMA SURFACE TREATMENT, BOARD TREATMENT SYSTEM HAVING THE SAME, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME ([[US Patent Application 18217043. APPARATUS FOR CONDUCTING PLASMA SURFACE TREATMENT, BOARD TREATMENT SYSTEM HAVING THE SAME, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES USING THE SAME simplified abstract|18217043]])=== |
| Line 699: |
Line 425: |
| | Junyoung Oh | | Junyoung Oh |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a surface treatment apparatus and system. The apparatus includes a process chamber where surface treatment is conducted, a plasma generator positioned outside the chamber that generates process radicals in a plasma state for the treatment process. A supply duct connects the plasma generator to the chamber, and a heat exchanger on the duct cools down the temperature of the process radicals. A flow controller controls the flow of the process radicals out of the chamber through a discharge duct. The apparatus allows for plasma surface treatment of package structures with small mounting gaps without causing damage to the IC chip and board.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A surface treatment apparatus and a surface treatment system having the same are disclosed. The surface treatment apparatus includes a process chamber in which the surface treatment process is conducted, a plasma generator for generating process radicals as a plasma state for the surface treatment process, the plasma generator being positioned outside of the process chamber and connected to the process chamber by a supply duct, a heat exchanger arranged on the supply duct and cooling down temperature of the process radicals passing through the supply duct and a flow controller controlling the process radicals to flow out of the process chamber. The flow controller is connected to a discharge duct through which the process radicals are discharged outside the process chamber. The plasma surface treatment process is conducted to the package structure having minute mounting gap without the damages to the IC chip and the board.
| |
| | | | |
| | ===MOLDING APPARATUS FOR SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE ([[US Patent Application 18117869. MOLDING APPARATUS FOR SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE simplified abstract|18117869]])=== | | ===MOLDING APPARATUS FOR SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE ([[US Patent Application 18117869. MOLDING APPARATUS FOR SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE simplified abstract|18117869]])=== |
| Line 713: |
Line 433: |
| | Minkyu Park | | Minkyu Park |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a molding apparatus that is used to create molded products. The apparatus consists of an upper mold and a lower mold, which are clamped together to create a space for molding. The lower mold has a seating surface where the substrate is placed. The lower mold also has suction grooves and vacuum holes. A release film is supplied onto the seating surface of the lower mold, and it is adhered using suction from the vacuum holes. The substrate is then placed on the release film and adhered using suction from the vacuum holes through the through holes of the release film.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A molding apparatus includes a lower mold having a seating surface on which at least one substrate is seated; an upper mold clamped with the lower mold to form a molding space; at least one substrate suction groove extending in the seating surface; a plurality of first vacuum holes extending through the lower mold to be in communication with the substrate suction groove; a plurality of second vacuum holes extending through the lower mold to be opened through the seating surface; and a release film supply mechanism configured to supply a release film having a plurality of through holes, on the seating surface of the lower mold. The release film is adhered on the seating surface by suctioning air from the second vacuum holes, and the substrate is adhered on the release film by suctioning air from the first vacuum holes through the through holes of the release film.
| |
| | | | |
| | ===MULTI-CHAMBER APPARATUS ([[US Patent Application 18214096. MULTI-CHAMBER APPARATUS simplified abstract|18214096]])=== | | ===MULTI-CHAMBER APPARATUS ([[US Patent Application 18214096. MULTI-CHAMBER APPARATUS simplified abstract|18214096]])=== |
| Line 727: |
Line 441: |
| | Yong Jun CHOI | | Yong Jun CHOI |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a multi-chamber apparatus used for processing a wafer. The apparatus consists of three chambers: a high etch rate chamber, a rinse chamber, and a supercritical drying chamber.
| |
| − |
| |
| − | In the high etch rate chamber, the wafer is placed and silicon nitride is etched using a solution of phosphoric acid.
| |
| − |
| |
| − | Next, the wafer is transferred to the rinse chamber where it is cleaned using a solution mixed with ammonia.
| |
| − |
| |
| − | Finally, the wafer is moved to the supercritical drying chamber where it is dried using a supercritical fluid.
| |
| − |
| |
| − | Overall, this apparatus provides a comprehensive process for etching, cleaning, and drying wafers in a controlled manner.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A multi-chamber apparatus for processing a wafer, the apparatus including a high etch rate chamber to receive the wafer and to etch silicon nitride with a phosphoric acid solution; a rinse chamber to receive the wafer and to clean the wafer with an ammonia mixed solution; and a supercritical drying chamber to dry the wafer with a supercritical fluid.
| |
| | | | |
| | ===SEMICONDUCTOR DEVICE INCLUDING SPACER VIA STRUCTURE AND METHOD OF MANUFACTURING THE SAME ([[US Patent Application 17841245. SEMICONDUCTOR DEVICE INCLUDING SPACER VIA STRUCTURE AND METHOD OF MANUFACTURING THE SAME simplified abstract|17841245]])=== | | ===SEMICONDUCTOR DEVICE INCLUDING SPACER VIA STRUCTURE AND METHOD OF MANUFACTURING THE SAME ([[US Patent Application 17841245. SEMICONDUCTOR DEVICE INCLUDING SPACER VIA STRUCTURE AND METHOD OF MANUFACTURING THE SAME simplified abstract|17841245]])=== |
| Line 749: |
Line 449: |
| | Janggeun LEE | | Janggeun LEE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a connection structure for an integrated circuit. It consists of three layers: the first layer has a metal line, the second layer has a via, and the third layer has a metal line connected to the first metal line through the via. The via includes a spacer structure made of an insulation material on the upper side.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A connection structure for an integrated circuit includes: a 1 layer including a 1 metal line; a 2 layer, above the 1 layer, including a 1 via; and a 3 layer, above the 2 layer, including a 2 metal line connected to the 1 metal line through the 1 via, wherein the 1 via comprises a spacer structure at a side of an upper portion of the 1 via, the spacer structure comprising an insulation material.
| |
| | | | |
| | ===SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME ([[US Patent Application 18158692. SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME simplified abstract|18158692]])=== | | ===SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME ([[US Patent Application 18158692. SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME simplified abstract|18158692]])=== |
| Line 763: |
Line 457: |
| | Hauk HAN | | Hauk HAN |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that consists of an insulating structure and two conductive structures within it. The first conductive structure has two layers, while the second conductive structure only has one layer. The width of the first conductive structure is larger than the second conductive structure. The first layer of the first conductive structure, the second layer of the first conductive structure, and the first layer of the second conductive structure all contain the same nonmetal element. However, the concentration of this nonmetal element in the second layer of the first conductive structure is higher than in the other two layers.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A semiconductor device includes an insulating structure, a first conductive structure in the insulating structure, the first conductive structure including a first conductive layer and a second conductive layer, and a second conductive structure in the insulating structure, the second conductive structure including a first conductive layer of the second conductive structure. A width of the first conductive structure is larger than a width of the second conductive structure. The first conductive layer of the first conductive structure, the second conductive layer of the first conductive structure, and the first conductive layer of the second conductive structure include a same nonmetal element. A concentration of the nonmetal element in the second conductive layer of the first conductive structure is higher than a concentration of the nonmetal element in the first conductive layer of the first conductive structure and first conductive layer of the second conductive structure.
| |
| | | | |
| | ===SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME ([[US Patent Application 18343784. SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME simplified abstract|18343784]])=== | | ===SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME ([[US Patent Application 18343784. SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME simplified abstract|18343784]])=== |
| Line 777: |
Line 465: |
| | Wonhyuk Hong | | Wonhyuk Hong |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that includes a transistor and multiple layers of metal. The first metal layer is connected to the transistor and has a lower wire. The second metal layer is on top of the first metal layer and has an upper wire that is connected to the lower wire. The second metal layer also includes a via structure and a line structure. The via structure is located in a via hole and is connected to the lower wire. It also has a barrier portion that extends vertically from the via portion to cover the inner surface of a line trench. The barrier portion is thicker at its lower level than at its upper level.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A semiconductor device includes a transistor on a substrate, a first metal layer that is on the transistor and includes a lower wire electrically connected to the transistor, and a second metal layer on the first metal layer. The second metal layer includes an upper wire that is electrically connected to the lower wire and includes a via structure in a via hole and a line structure in a line trench. The via structure includes a via portion that is in the via hole and is coupled to the lower wire, and a barrier portion that vertically extends from the via portion to cover an inner surface of the line trench. The barrier portion is between the line structure and an insulating layer of the second metal layer. The barrier portion is thicker at its lower level than at its upper level.
| |
| | | | |
| | ===SEMICONDUCTOR INTERCONNECT, ELECTRODE FOR SEMICONDUCTOR DEVICE, AND METHOD OF PREPARING MULTIELEMENT COMPOUND THIN FILM ([[US Patent Application 18342145. SEMICONDUCTOR INTERCONNECT, ELECTRODE FOR SEMICONDUCTOR DEVICE, AND METHOD OF PREPARING MULTIELEMENT COMPOUND THIN FILM simplified abstract|18342145]])=== | | ===SEMICONDUCTOR INTERCONNECT, ELECTRODE FOR SEMICONDUCTOR DEVICE, AND METHOD OF PREPARING MULTIELEMENT COMPOUND THIN FILM ([[US Patent Application 18342145. SEMICONDUCTOR INTERCONNECT, ELECTRODE FOR SEMICONDUCTOR DEVICE, AND METHOD OF PREPARING MULTIELEMENT COMPOUND THIN FILM simplified abstract|18342145]])=== |
| Line 791: |
Line 473: |
| | Youngjae KANG | | Youngjae KANG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor interconnect and electrode for semiconductor devices. These components are made of a thin film material that is a multielement compound represented by Formula 1. The film has a thickness of 50 nm or less and a grain size to thickness ratio of 1.2 or greater. It also has a resistivity of 200 µΩ·cm or less.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A semiconductor interconnect and an electrode for semiconductor devices may include a thin film including a multielement compound represented by Formula 1 and having a thickness equal to or less than about 50 nm, a grain size (A) to thickness (B) ratio (A/B) equal to or greater than about 1.2, and a resistivity equal to or less than about 200 µΩ·cm:
| |
| | | | |
| | ===SEMICONDUCTOR PACKAGE ([[US Patent Application 18128871. SEMICONDUCTOR PACKAGE simplified abstract|18128871]])=== | | ===SEMICONDUCTOR PACKAGE ([[US Patent Application 18128871. SEMICONDUCTOR PACKAGE simplified abstract|18128871]])=== |
| Line 805: |
Line 481: |
| | Minkyeong Park | | Minkyeong Park |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor package that includes a substrate, two chip structures, and at least one controller. The controller is positioned between the two chip structures and has edge pads and center pads. The substrate has first and second bonding pads arranged in a perpendicular direction. The bonding wire structures connect the edge pads to the first bonding pads and the center pads to the second bonding pads.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A semiconductor package includes a substrate, a first chip structure disposed on the substrate, a second chip structure disposed on the substrate, at least one controller disposed between the first chip structure and the second chip structure, the at least one controller including edge pads disposed on edges opposing each other in a first direction, and center pads disposed between the edge pads, and bonding wire structures. The substrate includes first bonding pads arranged in a second direction, perpendicular to the first direction, and second bonding pads arranged in the second direction in at least one of a space between the first bonding pads and the first chip structure and a space between the first bonding pads and the second chip structure. The bonding wire structures include a first bonding wire structure connecting the edge pads to the first bonding pads, and a second bonding wire structure connecting the center pads to the second bonding pads.
| |
| | | | |
| | ===SEMICONDUCTOR PACKAGE ([[US Patent Application 18216445. SEMICONDUCTOR PACKAGE simplified abstract|18216445]])=== | | ===SEMICONDUCTOR PACKAGE ([[US Patent Application 18216445. SEMICONDUCTOR PACKAGE simplified abstract|18216445]])=== |
| Line 819: |
Line 489: |
| | WANHO PARK | | WANHO PARK |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor package that consists of a stack of semiconductor chips placed vertically on a substrate. The chips are connected to the substrate through pillars. The lowermost chip has an adhesive layer on its bottom surface, which is protected by a first lower protective layer and a second lower protective layer. The entire chip stack is then covered by a mold layer that fills the space between the pillars. The second lower protective layer is thicker than the adhesive layer in the vertical direction.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A semiconductor package includes a chip stack comprising semiconductor chips vertically stacked on a substrate in a first direction perpendicular to a top surface of the substrate, pillars between the substrate and the chip stack, an adhesive layer on a bottom surface of a lowermost semiconductor chip of the semiconductor chips, a first lower protective layer between the adhesive layer and the pillars, a second lower protective layer between the first lower protective layer and the adhesive layer, and a mold layer covering the chip stack and filling a space between the pillars. A thickness of the second lower protective layer in the first direction is greater than a thickness of the adhesive layer in the first direction.
| |
| | | | |
| | ===INTEGRATED CIRCUIT DEVICES ([[US Patent Application 18063937. INTEGRATED CIRCUIT DEVICES simplified abstract|18063937]])=== | | ===INTEGRATED CIRCUIT DEVICES ([[US Patent Application 18063937. INTEGRATED CIRCUIT DEVICES simplified abstract|18063937]])=== |
| Line 833: |
Line 497: |
| | Seungmin SONG | | Seungmin SONG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an integrated circuit device that has a channel area and a gate cut structure. The gate cut structure has a tapered shape, meaning it becomes narrower as it goes from the bottom to the top. There are also two gate electrodes that face each other with the gate cut structure in between. These gate electrodes can extend in a different direction from the channel area.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An integrated circuit device includes a channel area extending in a first horizontal direction, a gate cut structure having a tapered shape in which a horizontal width thereof decreases while extending from a lower side to an upper side in a vertical direction, and a pair of gate electrodes respectively having ends facing each other with the gate cut structure therebetween. The pair of gate electrodes may extend in a second horizontal direction intersecting with the first horizontal direction.
| |
| | | | |
| | ===SEMICONDUCTOR DEVICES ([[US Patent Application 18347023. SEMICONDUCTOR DEVICES simplified abstract|18347023]])=== | | ===SEMICONDUCTOR DEVICES ([[US Patent Application 18347023. SEMICONDUCTOR DEVICES simplified abstract|18347023]])=== |
| Line 847: |
Line 505: |
| | Sungmin KIM | | Sungmin KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that consists of two transistors stacked on top of each other on a substrate. The first transistor has a gate structure, source/drain layers on each side of the gate, and semiconductor patterns that are separated vertically. These semiconductor patterns go through the gate structure and make contact with the source/drain layers. The division pattern in between the transistors is made of an insulating material. The second transistor also has a gate structure, source/drain layers, and semiconductor patterns that are vertically spaced apart. These semiconductor patterns also go through the gate structure and make contact with the source/drain layers. Importantly, the source/drain layer of the first transistor does not directly touch the source/drain layer of the second transistor.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A semiconductor device includes a first transistor, a division pattern, and a second transistor sequentially stacked on a substrate. The first transistor includes a first gate structure, a first source/drain layer at each of opposite sides of the first gate structure, and first semiconductor patterns spaced apart from each other in a vertical direction. Each of the first semiconductor patterns extends through the first gate structure and contacts the first source/drain layer. The division pattern includes an insulating material. The second transistor includes a second gate structure, a second source/drain layer at each of opposite sides of the second gate structure, and second semiconductor patterns spaced apart from each other in the vertical direction. Each of the second semiconductor patterns extends through the second gate structure and contacts the second source/drain layer. The first source/drain layer does not directly contact the second source/drain layer.
| |
| | | | |
| | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18216041. SEMICONDUCTOR DEVICE simplified abstract|18216041]])=== | | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18216041. SEMICONDUCTOR DEVICE simplified abstract|18216041]])=== |
| Line 861: |
Line 513: |
| | Dong-chan SUH | | Dong-chan SUH |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that includes a substrate with two regions. In each region, there are fin type active areas that extend away from the substrate. Nanosheets are present parallel to the upper surface of the fin type active areas, with a gap between them and the surface. A gate extends over the fin type active areas in a direction perpendicular to the nanosheets. A gate dielectric layer is placed between the gate and each nanosheet. The device also has source and drain regions in both regions of the substrate. Insulating spacers are positioned between the fin type active areas and the nanosheets, and air spacers are placed between the insulating spacers and the first source and drain regions.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A semiconductor device includes a substrate including a first region and a second region, fin type active areas extending in a first direction away from the substrate in each of the first and second regions, a plurality of nanosheets extending parallel to an upper surface of the fin type active areas and being spaced apart from the upper surface of the fin type active areas, a gate extending over the fin type active areas in a second direction crossing the first direction, a gate dielectric layer interposed between the gate and each of the nanosheets, first source and drain regions included in the first region and second source and drain regions included in the second region, and insulating spacers interposed between the fin type active areas and the nanosheets, wherein air spacers are interposed between the insulating spacers and the first source and drain regions.
| |
| | | | |
| | ===INTEGRATED CIRCUIT INCLUDING INTEGRATED STANDARD CELL STRUCTURE ([[US Patent Application 18344794. INTEGRATED CIRCUIT INCLUDING INTEGRATED STANDARD CELL STRUCTURE simplified abstract|18344794]])=== | | ===INTEGRATED CIRCUIT INCLUDING INTEGRATED STANDARD CELL STRUCTURE ([[US Patent Application 18344794. INTEGRATED CIRCUIT INCLUDING INTEGRATED STANDARD CELL STRUCTURE simplified abstract|18344794]])=== |
| Line 875: |
Line 521: |
| | Gi Young Yang | | Gi Young Yang |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an integrated circuit that consists of two active regions, a power rail, and a ground rail. The active regions are positioned in a specific direction and are separated from each other. The power rail and ground rail are also positioned in the same direction but are spaced apart from the active regions and each other. The circuit includes source/drain contacts that extend in a different direction and are located on either the first or second active region. Additionally, gate structures are present on both active regions. The power rail supplies power through source/drain contact vias, while the ground rail supplies a ground voltage through source/drain contact vias.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An integrated circuit including a first active region and a second active region extending in a first direction and spaced apart from each other in a second direction intersecting the first direction; a power rail and a ground rail extending in the first direction and spaced apart from the first and second active regions and each other in the second direction; source/drain contacts extending in the second direction on at least a portion of the first or second active region, gate structures extending in the second direction and on at least a portion of the first and second active regions, a power rail configured to supply power through source/drain contact vias, and a ground rail configured to supply a ground voltage through source/drain contact vias.
| |
| | | | |
| | ===IMAGE SENSOR INCLUDING COLOR FILTER GRID INCLUDING PORTION OVERLAPPING SUPER PHASE DETECTION (PD) PIXEL ([[US Patent Application 18216170. IMAGE SENSOR INCLUDING COLOR FILTER GRID INCLUDING PORTION OVERLAPPING SUPER PHASE DETECTION (PD) PIXEL simplified abstract|18216170]])=== | | ===IMAGE SENSOR INCLUDING COLOR FILTER GRID INCLUDING PORTION OVERLAPPING SUPER PHASE DETECTION (PD) PIXEL ([[US Patent Application 18216170. IMAGE SENSOR INCLUDING COLOR FILTER GRID INCLUDING PORTION OVERLAPPING SUPER PHASE DETECTION (PD) PIXEL simplified abstract|18216170]])=== |
| Line 889: |
Line 529: |
| | In Sung JOE | | In Sung JOE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an image sensor with different pixel regions and lenses. It includes a substrate with two surfaces, a first pixel region, a second pixel region, and a third pixel region. The first lens is placed on the first pixel region, while the second lens is on the second and third pixel regions. An element separation film is present in the substrate between the first and second pixel regions. A first color filter allows light focused by the second lens to pass through to the second and third pixel regions. The first pixel region has a width between 0.5 um and 0.9 um in a specific direction, and the first lens is located on the second surface, which is parallel to that direction.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An image sensor a substrate comprising a first surface and a second surface opposite to the first surface; a first pixel region; a second pixel region; a third pixel region; a first lens on the first pixel region; a second lens on the second and third pixel regions; an element separation film provided in the substrate and interposed between the first pixel region the second pixel region; a first color filter configured to transmit light focused by the second lens to the second pixel region and the third pixel region; and a color filter grid forming a region in which the first color filter is provided. A width of the first pixel region in a first direction is between 0.5 um and 0.9 um. The first lens is disposed on the second surface. The first direction is parallel to the second surface.
| |
| | | | |
| | ===IMAGE SENSOR AND ELECTRONIC SYSTEM INCLUDING THE SAME ([[US Patent Application 18093609. IMAGE SENSOR AND ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract|18093609]])=== | | ===IMAGE SENSOR AND ELECTRONIC SYSTEM INCLUDING THE SAME ([[US Patent Application 18093609. IMAGE SENSOR AND ELECTRONIC SYSTEM INCLUDING THE SAME simplified abstract|18093609]])=== |
| Line 903: |
Line 537: |
| | Kyoungeun CHANG | | Kyoungeun CHANG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an image sensor that has a unique design with an asymmetric fin region and a transistor. The transistor has both a horizontal and vertical gate portion, and the source and drain regions are positioned at different distances from the fin region. This design is part of an electronic system that includes a camera module and a processor for processing image data.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An image sensor includes a substrate having a pixel region in which an active region having a locally asymmetric fin region limited by a locally cutout space is defined and a transistor provided in the pixel region. The transistor includes a horizontal gate portion provided on the active region and a vertical gate portion filling the locally cutout space and facing one of fin sidewalls of the locally asymmetric fin region. Distances of the source region and drain region formed in the active region from the locally asymmetric fin region are different from each other. An electronic system includes at least one camera module including an image sensor and a processor configured to process image data provided from the at least one camera module.
| |
| | | | |
| | ===IMAGE SENSOR AND METHOD FOR FABRICATING THE SAME ([[US Patent Application 18166241. IMAGE SENSOR AND METHOD FOR FABRICATING THE SAME simplified abstract|18166241]])=== | | ===IMAGE SENSOR AND METHOD FOR FABRICATING THE SAME ([[US Patent Application 18166241. IMAGE SENSOR AND METHOD FOR FABRICATING THE SAME simplified abstract|18166241]])=== |
| Line 917: |
Line 545: |
| | Ju Hee LEE | | Ju Hee LEE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an image sensor that has a substrate with a photoelectric conversion region. The substrate has a trench, and there is a floating diffusion region next to the trench. The sensor also includes a gate dielectric film that covers the side and lower surfaces of the trench. The transfer gate electrode consists of a lower gate and an upper gate, with the upper gate being narrower than the lower gate. The gate dielectric film has two layers, a lower layer with a smaller thickness and an upper layer with a larger thickness near the floating diffusion region.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An image sensor includes a substrate, a photoelectric conversion region in the substrate with the substrate defining a substrate trench on the photoelectric conversion region, a floating diffusion region adjacent to a side surface of the substrate trench, in the substrate, a gate dielectric film that extends along the side surface and a lower surface of the substrate trench and a transfer gate electrode which includes a lower gate that fills a portion of the substrate trench on the gate dielectric film and has a first width, and an upper gate that has a second width smaller than the first width on the lower gate. The gate dielectric film includes a lower dielectric film interposed between the substrate and the lower gate and has a first thickness, and an upper dielectric film adjacent to the floating diffusion region and has a second thickness greater than the first thickness.
| |
| | | | |
| | ===3D-STACKED SEMICONDUCTOR DEVICE INCLUDING SOURCE/DRAIN INNER SPACERS FORMED USING CHANNEL ISOLATION STRUCTURE INCLUDING THIN SILICON LAYER ([[US Patent Application 17882203. 3D-STACKED SEMICONDUCTOR DEVICE INCLUDING SOURCE/DRAIN INNER SPACERS FORMED USING CHANNEL ISOLATION STRUCTURE INCLUDING THIN SILICON LAYER simplified abstract|17882203]])=== | | ===3D-STACKED SEMICONDUCTOR DEVICE INCLUDING SOURCE/DRAIN INNER SPACERS FORMED USING CHANNEL ISOLATION STRUCTURE INCLUDING THIN SILICON LAYER ([[US Patent Application 17882203. 3D-STACKED SEMICONDUCTOR DEVICE INCLUDING SOURCE/DRAIN INNER SPACERS FORMED USING CHANNEL ISOLATION STRUCTURE INCLUDING THIN SILICON LAYER simplified abstract|17882203]])=== |
| Line 931: |
Line 553: |
| | Jaejik BAEK | | Jaejik BAEK |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a multi-stack semiconductor device that includes a substrate and two nanosheet transistors stacked on top of each other. The lower nanosheet transistor has a lower channel structure, a lower gate structure, and lower source/drain regions. It is isolated from the upper nanosheet transistor by at least one lower inner spacer. The upper nanosheet transistor has an upper channel structure, an upper gate structure, and upper source/drain regions. It is isolated from the lower nanosheet transistor by at least one upper inner spacer. There is also an isolation structure between the lower and upper channel structures. The abstract mentions that a spacer structure made of the same material as the inner spacers is formed at the side of the isolation structure.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Provided is a multi-stack semiconductor device including: a substrate; a lower nanosheet transistor including a lower channel structure; a lower gate structure surrounding the lower channel structure and including a gate dielectric layer; lower source/drain regions at both ends of the lower channel structure; and at least one lower inner spacer isolating the lower source/drain regions from the lower gate structure; an upper nanosheet transistor, on the lower nanosheet transistor, including an upper channel structure; an upper gate structure surrounding the upper channel structure and including the gate dielectric layer; upper source/drain regions at both ends of the upper channel structure; and at least one upper inner spacer isolating the upper source/drain regions from the upper gate structure; and an isolation structure between the lower and upper channel structures, wherein a spacer structure including a same material forming the lower or upper inner spacer is formed at a side of the isolation structure.
| |
| | | | |
| | ===3D-STACKED SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE FORMED OF POLYCRYSTALLINE SILICON OR POLYCRYSTALLINE SILICON INCLUDING DOPANTS ([[US Patent Application 17964677. 3D-STACKED SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE FORMED OF POLYCRYSTALLINE SILICON OR POLYCRYSTALLINE SILICON INCLUDING DOPANTS simplified abstract|17964677]])=== | | ===3D-STACKED SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE FORMED OF POLYCRYSTALLINE SILICON OR POLYCRYSTALLINE SILICON INCLUDING DOPANTS ([[US Patent Application 17964677. 3D-STACKED SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE FORMED OF POLYCRYSTALLINE SILICON OR POLYCRYSTALLINE SILICON INCLUDING DOPANTS simplified abstract|17964677]])=== |
| Line 945: |
Line 561: |
| | Seungchan YUN | | Seungchan YUN |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a multi-stack semiconductor device that consists of a substrate, a lower field-effect transistor, and an upper field-effect transistor. The lower field-effect transistor has a lower channel structure surrounded by a lower gate structure, which includes a lower work-function metal layer and a lower gate electrode. Similarly, the upper field-effect transistor has an upper channel structure surrounded by an upper gate structure, which includes an upper work-function metal layer and an upper gate electrode. Both the lower and upper gate electrodes are made of a metal or a metal compound. The lower gate electrode is composed of polycrystalline silicon (poly-Si) or poly-Si with a dopant, while the upper gate electrode is made of a metal or a metal compound.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Provided is a multi-stack semiconductor device that includes: a substrate; a lower field-effect transistor in which a lower channel structure is surrounded by a lower gate structure including a lower work-function metal layer and a lower gate electrode; and an upper field-effect transistor in which an upper channel structure is surrounded by an upper gate structure including an upper work-function metal layer and an upper gate electrode, wherein each of the lower gate electrode and the upper gate electrode includes a metal or a metal compound, and wherein the lower gate electrode comprises polycrystalline silicon (poly-Si) or poly-Si comprising a dopant, and the upper gate electrode comprises a metal or a metal compound.
| |
| | | | |
| | ===BOUNDARY GATE STRUCTURE FOR DIFFUSION BREAK IN 3D-STACKED SEMICONDUCTOR DEVICE ([[US Patent Application 17988485. BOUNDARY GATE STRUCTURE FOR DIFFUSION BREAK IN 3D-STACKED SEMICONDUCTOR DEVICE simplified abstract|17988485]])=== | | ===BOUNDARY GATE STRUCTURE FOR DIFFUSION BREAK IN 3D-STACKED SEMICONDUCTOR DEVICE ([[US Patent Application 17988485. BOUNDARY GATE STRUCTURE FOR DIFFUSION BREAK IN 3D-STACKED SEMICONDUCTOR DEVICE simplified abstract|17988485]])=== |
| Line 959: |
Line 569: |
| | Saehan PARK | | Saehan PARK |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a three-dimensional stacked semiconductor device. It consists of a lower active region divided into two sub-regions (lower-1active and lower-2active) by a lower boundary gate structure. Above the lower active region is an upper active region divided into two sub-regions (upper-1active and upper-2active) by an upper boundary gate structure. The key feature is that either the lower or upper boundary gate structure is reverse-biased, which means it is used to electrically isolate one sub-region from the other. This allows for better control and functionality of the device.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Provided is a three-dimensional stacked (3D-stacked) semiconductor device which includes: a lower active region divided into a lower-1active sub-region and a lower-2active sub-region by at least one lower boundary gate structure; and an upper active region, above the lower active region, divided into an upper-1active sub-region and an upper-2active sub-region by at least one upper boundary gate structure, wherein at least one of the lower boundary gate structure and the upper boundary gate structure is reverse-biased to electrically isolate the lower-1active sub-region from the lower-2active sub-region, and/or electrically isolate the upper-1active sub-region from the upper-2active sub-region
| |
| | | | |
| | ===NITRIDE SEMICONDUCTOR BUFFER STRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME ([[US Patent Application 18306341. NITRIDE SEMICONDUCTOR BUFFER STRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME simplified abstract|18306341]])=== | | ===NITRIDE SEMICONDUCTOR BUFFER STRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME ([[US Patent Application 18306341. NITRIDE SEMICONDUCTOR BUFFER STRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME simplified abstract|18306341]])=== |
| Line 973: |
Line 577: |
| | Boram KIM | | Boram KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a nitride semiconductor buffer structure and a semiconductor device that uses this structure. The buffer structure consists of multiple layers placed between a substrate and an active layer. The active layer is made of a nitride semiconductor. The buffer layers are stacked on top of each other on the substrate and each layer has a super lattice structure. They are made of a doped nitride semiconductor and have different compositions and doping concentrations from each other.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Provided are a nitride semiconductor buffer structure and a semiconductor device including the same. The buffer structure may include a plurality of buffer layers between a substrate and an active layer. The active layer may include a nitride semiconductor. The plurality of buffer layers may be stacked on each other on the substrate. Each of the plurality of buffer layers may have a super lattice structure and may include a doped nitride semiconductor. The plurality of buffer layers may have different compositions from each other. Adjacent buffer layers, among the plurality of buffer layers, may have different doping concentrations from each other.
| |
| | | | |
| | ===VIA STRUCTURE CONNECTING FRONT SIDE STRUCTURE OF SEMICONDUCTOR DEVICE TO BSPDN, AND METHOD OF MANUFACTURING THE SAME USING SACRIFICIAL VIA STRUCTURE ([[US Patent Application 17885237. VIA STRUCTURE CONNECTING FRONT SIDE STRUCTURE OF SEMICONDUCTOR DEVICE TO BSPDN, AND METHOD OF MANUFACTURING THE SAME USING SACRIFICIAL VIA STRUCTURE simplified abstract|17885237]])=== | | ===VIA STRUCTURE CONNECTING FRONT SIDE STRUCTURE OF SEMICONDUCTOR DEVICE TO BSPDN, AND METHOD OF MANUFACTURING THE SAME USING SACRIFICIAL VIA STRUCTURE ([[US Patent Application 17885237. VIA STRUCTURE CONNECTING FRONT SIDE STRUCTURE OF SEMICONDUCTOR DEVICE TO BSPDN, AND METHOD OF MANUFACTURING THE SAME USING SACRIFICIAL VIA STRUCTURE simplified abstract|17885237]])=== |
| Line 987: |
Line 585: |
| | Eun Sung KIM | | Eun Sung KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor device that consists of a transistor, a front side structure, and a back side structure. These structures are positioned opposite each other in relation to the transistor. The device also includes a front via, which is a connection between the front side structure and the back side structure. The front via is formed by a via hole, which is made up of a lower via hole and an upper via hole that are vertically connected. The via hole has a bent structure on the side where the lower and upper via holes meet.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Provided is a semiconductor device that includes: at least one transistor, a front side structure, and a back side structure, the front side structure being disposed opposite to the back side structure with respect to the transistor; and a front via formed at a side of the transistor and connecting the front side structure to the back side structure, wherein the front via is formed in a via hole formed of a lower via hole and an upper via hole vertically connected to each other, and wherein the via hole has a bent structure at a side surface thereof where the lower via hole is connected to the upper via hole.
| |
| | | | |
| | ===3D-STACKED SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE WITH RMG INNER SPACER PROTECTING LOWER WORK-FUNCTION METAL LAYER ([[US Patent Application 17891777. 3D-STACKED SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE WITH RMG INNER SPACER PROTECTING LOWER WORK-FUNCTION METAL LAYER simplified abstract|17891777]])=== | | ===3D-STACKED SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE WITH RMG INNER SPACER PROTECTING LOWER WORK-FUNCTION METAL LAYER ([[US Patent Application 17891777. 3D-STACKED SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE WITH RMG INNER SPACER PROTECTING LOWER WORK-FUNCTION METAL LAYER simplified abstract|17891777]])=== |
| Line 1,001: |
Line 593: |
| | Byounghak HONG | | Byounghak HONG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a multi-stack semiconductor device that consists of two field-effect transistors. The lower transistor has a lower channel structure surrounded by a lower gate structure, while the upper transistor has an upper channel structure surrounded by an upper gate structure. The upper channel structure is narrower than the lower channel structure. A replacement metal gate inner spacer is formed between the lower and upper gate structures in regions where the lower channel structure is not vertically overlapped by the upper channel structure.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Provided is a multi-stack semiconductor device that includes: a lower field-effect transistor in which a lower channel structure is surrounded by a lower gate structure including a lower gate dielectric layer, a lower work-function metal layer and a lower gate metal pattern; and an upper field-effect transistor in which an upper channel structure is surrounded by an upper gate structure including an upper gate dielectric layer, an upper work-function metal layer and an upper gate metal pattern, wherein a channel width of the upper channel structure is smaller than a channel width of the lower channel structure, and wherein a replacement metal gate (RMG) inner spacer is formed between the lower work-function metal layer and the upper work-function metal layer at regions where the lower channel structure is not vertically overlapped by the upper channel structure.
| |
| | | | |
| | ===SEMICONDUCTOR DEVICE INCLUDING METAL-2 DIMENSIONAL MATERIAL-SEMICONDUCTOR JUNCTION ([[US Patent Application 18151775. SEMICONDUCTOR DEVICE INCLUDING METAL-2 DIMENSIONAL MATERIAL-SEMICONDUCTOR JUNCTION simplified abstract|18151775]])=== | | ===SEMICONDUCTOR DEVICE INCLUDING METAL-2 DIMENSIONAL MATERIAL-SEMICONDUCTOR JUNCTION ([[US Patent Application 18151775. SEMICONDUCTOR DEVICE INCLUDING METAL-2 DIMENSIONAL MATERIAL-SEMICONDUCTOR JUNCTION simplified abstract|18151775]])=== |
| Line 1,015: |
Line 601: |
| | Keunwook SHIN | | Keunwook SHIN |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a semiconductor device that consists of several layers. The first layer is made of a semiconductor material, and it is facing a metal layer that has conductivity. Between these two layers, there is a layer made of a 2D material. Additionally, there is a second semiconductor layer between the first semiconductor layer and the 2D material layer. This second semiconductor layer is made of a different material than the first semiconductor layer, specifically germanium. The second semiconductor layer and the 2D material layer are in direct contact with each other.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A semiconductor device may include a first semiconductor layer including a first semiconductor material; a metal layer facing the first semiconductor layer and having conductivity; a 2D material layer between the first semiconductor layer and the metal layer; and a second semiconductor layer between the first semiconductor layer and the 2D material layer. The second semiconductor layer may include a second semiconductor material different from the first semiconductor material. The second semiconductor layer and the 2D material layer may be in direct contact with each other. The second semiconductor material may include germanium.
| |
| | | | |
| | ===CATHODE ACTIVE MATERIAL, METHOD OF PREPARING THE SAME, AND CATHODE AND SECONDARY BATTERY INCLUDING THE SAME ([[US Patent Application 18089949. CATHODE ACTIVE MATERIAL, METHOD OF PREPARING THE SAME, AND CATHODE AND SECONDARY BATTERY INCLUDING THE SAME simplified abstract|18089949]])=== | | ===CATHODE ACTIVE MATERIAL, METHOD OF PREPARING THE SAME, AND CATHODE AND SECONDARY BATTERY INCLUDING THE SAME ([[US Patent Application 18089949. CATHODE ACTIVE MATERIAL, METHOD OF PREPARING THE SAME, AND CATHODE AND SECONDARY BATTERY INCLUDING THE SAME simplified abstract|18089949]])=== |
| Line 1,029: |
Line 609: |
| | Sangbok Ma | | Sangbok Ma |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a cathode active material that has an olivine structure and is represented by a compound formula (Formula 1).
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A cathode active material including a compound represented by Formula 1 and having an olivine structure:
| |
| | | | |
| | ===ELECTRONIC DEVICE, OPERATION METHOD OF ELECTRONIC DEVICE, AND FOLDABLE ELECTRONIC DEVICE ([[US Patent Application 18214781. ELECTRONIC DEVICE, OPERATION METHOD OF ELECTRONIC DEVICE, AND FOLDABLE ELECTRONIC DEVICE simplified abstract|18214781]])=== | | ===ELECTRONIC DEVICE, OPERATION METHOD OF ELECTRONIC DEVICE, AND FOLDABLE ELECTRONIC DEVICE ([[US Patent Application 18214781. ELECTRONIC DEVICE, OPERATION METHOD OF ELECTRONIC DEVICE, AND FOLDABLE ELECTRONIC DEVICE simplified abstract|18214781]])=== |
| Line 1,043: |
Line 617: |
| | Dongsub LEE | | Dongsub LEE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that has two antennas and two front-end modules. The device also includes two switches and a processor. The first front-end module processes signals transmitted through the first antenna or received through the first antenna. The second front-end module processes signals received through the second antenna. The first switch connects the first front-end module to either the first antenna or a first path. The second switch connects the second antenna to either the second front-end module or the first path. The processor controls the switches based on the communication signal being transmitted through the first antenna, connecting the first antenna to the first front-end module and the second antenna to the first path.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An electronic device includes a first antenna; a second antenna; a first front-end module configured to process a signal transmitted through the first antenna or the second antenna and process a signal received through the first antenna; a second front-end module configured to process a signal received through the second antenna; a first switch configured to connect the first front-end module to one of the first antenna or a first path; a second switch configured to connect the second antenna to one of the second front-end module or the first path; and a processor configured to, based on a communication signal being transmitted through the first antenna, control the first switch and the second switch to connect the first antenna to the first front-end module and connect the second antenna to the first path.
| |
| | | | |
| | ===ELECTRONIC DEVICE INCLUDING EMI ABSORBER ([[US Patent Application 18332322. ELECTRONIC DEVICE INCLUDING EMI ABSORBER simplified abstract|18332322]])=== | | ===ELECTRONIC DEVICE INCLUDING EMI ABSORBER ([[US Patent Application 18332322. ELECTRONIC DEVICE INCLUDING EMI ABSORBER simplified abstract|18332322]])=== |
| Line 1,057: |
Line 625: |
| | Eunbae KWON | | Eunbae KWON |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that has a housing with a front surface plate, a rear surface plate, and a side surface. Inside the device, there is a support structure, a display, a wireless communication circuit, camera circuitry, and a conductive pattern. The conductive pattern overlaps with the camera circuitry and is connected to the ground of the device. This allows some electromagnetic waves from the antenna to flow to the ground through the conductive pattern, reducing interference with the camera circuitry.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An electronic device is provided. The electronic device includes a housing including a front surface plate, a rear surface plate, and a side surface portion providing a side surface, a first support positioned between the front surface plate and the rear surface plate and connected to the side surface portion, a display, a wireless communication circuit configured to transmit or receive a signal through an antenna radiator, camera circuitry positioned between the first support and the rear surface plate, and a conductive pattern positioned between the first support and the rear surface plate and at least partially overlapping with the camera circuitry when viewed from a top of the rear surface plate, and electrically connected to a ground of the electronic device, some electromagnetic waves, which travel toward the camera circuitry, among electromagnetic waves radiating from the antenna radiator, flow to the ground through the conductive pattern.
| |
| | | | |
| | ===ELECTRONIC DEVICE CAPABLE OF PROVIDING POWER TO EXTERNAL DEVICE ([[US Patent Application 18218168. ELECTRONIC DEVICE CAPABLE OF PROVIDING POWER TO EXTERNAL DEVICE simplified abstract|18218168]])=== | | ===ELECTRONIC DEVICE CAPABLE OF PROVIDING POWER TO EXTERNAL DEVICE ([[US Patent Application 18218168. ELECTRONIC DEVICE CAPABLE OF PROVIDING POWER TO EXTERNAL DEVICE simplified abstract|18218168]])=== |
| Line 1,071: |
Line 633: |
| | Kyunghwan LEE | | Kyunghwan LEE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that includes a battery, an interface module, a detection module, a protection module, and a charging module. The detection module detects when an external device is connected to the interface module. The protection module includes a switching element that turns on when it receives power from the charging module. The charging module raises the power from the battery to a specific level using a voltage conversion circuit, resulting in a second power. After a certain amount of time, the charging module turns on a second switching element, providing the second power to the protection module.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | According to certain embodiments, an electronic device comprises: a battery; an interface module; a detection module electrically connected with the interface module, the detection module configured to detect than an external electronic device for receiving power is connected to the interface module; a protection module electrically connected with the interface module and comprising a first switching element; and a charging module electrically connected with the protection module, the detection module, and the battery, and comprising a voltage conversion circuit and a second switching element, the charging module configured to provide a first power to the protection module when the detection module detects connection of the external electronic device, wherein the first switching element is configured to turn on after receiving the first power, wherein the charging module is configured to raise a power from the battery to a designated value through the voltage conversion circuit, thereby resulting in a second power, and, when a designated first time is elapsed after the power from the battery is raised to the designated value, turn on the second switching element, thereby providing the second power to the protection module.
| |
| | | | |
| | ===MOTOR AND CLEANER COMPRISING THE SAME ([[US Patent Application 18216063. MOTOR AND CLEANER COMPRISING THE SAME simplified abstract|18216063]])=== | | ===MOTOR AND CLEANER COMPRISING THE SAME ([[US Patent Application 18216063. MOTOR AND CLEANER COMPRISING THE SAME simplified abstract|18216063]])=== |
| Line 1,085: |
Line 641: |
| | Woong HWANG | | Woong HWANG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a motor and a cleaner that includes the motor. The motor consists of a stator with a stator core, a rotating shaft that fits inside the stator, a rotor that can rotate around the shaft by interacting with the stator electromagnetically, a housing to hold the stator and rotor, and a bearing that connects the housing and allows the stator and rotor to be securely connected. The stator core and rotor are positioned at different locations along the extension of the rotating shaft inside the housing.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A motor and a cleaner comprising the same. The motor comprises a stator including a stator core; a rotating shaft arrangeable inside the stator; a rotor rotatable about the rotating shaft by electromagnetically interacting with the stator while the rotating shaft is arranged inside the stator; a housing to accommodate the stator and the rotor; and a bearing coupleable to the housing such that while the bearing is coupled to the housing, the bearing allows the stator and the rotor to be stably coupled to each other. While the stator and the rotor are accommodated in the housing, a center of the stator core and a center of the rotor along an extension direction of the rotating shaft is arranged at different positions from each other with respect to the extension direction of the rotating shaft.
| |
| | | | |
| | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18087439. SEMICONDUCTOR DEVICE simplified abstract|18087439]])=== | | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18087439. SEMICONDUCTOR DEVICE simplified abstract|18087439]])=== |
| Line 1,099: |
Line 649: |
| | Kwanyeob CHAE | | Kwanyeob CHAE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a semiconductor device that includes an equalizer circuit and a driver circuit. The equalizer circuit generates control signals for two bits of original data. The driver circuit consists of pull-up and pull-down transistors connected between an output node and power supply nodes. The pull-up transistors are connected in parallel and series configurations, while the pull-down transistors are connected in series. The driver circuit operates with different power supply voltages, where the second power supply voltage is lower than the first power supply voltage. The driver circuit is connected to the equalizer circuit in series.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A semiconductor device is provided. The semiconductor device includes: an equalizer circuit configured to output a first control signal corresponding to a first bit of original two-bit data and a second control signal corresponding to a second bit of the original two-bit data; and a driver circuit including a plurality of pull-up transistors connected between an output node and a first power node configured to provide a first power supply voltage, and a plurality of pull-down transistors connected between the output node and a second power node configured to provide a second power supply voltage, wherein the second power supply voltage is lower than the first power supply voltage, and the driver circuit is connected to the equalizer circuit in series. The plurality of pull-up transistors includes a first pull-up transistor and a second pull-up transistor connected to each other in parallel, between the first power node and the output node, and a third pull-up transistor and a fourth pull-up transistor connected to each other in series, between the first power node and the output node.
| |
| | | | |
| | ===TRANSMITTER AND RECEIVER FOR 3-LEVEL PULSE AMPLITUDE MODULATION SIGNALING AND SYSTEM INCLUDING THE SAME ([[US Patent Application 17975034. TRANSMITTER AND RECEIVER FOR 3-LEVEL PULSE AMPLITUDE MODULATION SIGNALING AND SYSTEM INCLUDING THE SAME simplified abstract|17975034]])=== | | ===TRANSMITTER AND RECEIVER FOR 3-LEVEL PULSE AMPLITUDE MODULATION SIGNALING AND SYSTEM INCLUDING THE SAME ([[US Patent Application 17975034. TRANSMITTER AND RECEIVER FOR 3-LEVEL PULSE AMPLITUDE MODULATION SIGNALING AND SYSTEM INCLUDING THE SAME simplified abstract|17975034]])=== |
| Line 1,113: |
Line 657: |
| | Changkyu SEOL | | Changkyu SEOL |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a transmitter that takes binary input bits and divides them into two groups. It then manipulates each group differently based on the value of the first group. The transmitter encodes these manipulated groups into symbol groups, where each symbol has three different voltage levels. Finally, the transmitter generates an output data signal by combining the symbol groups.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A transmitter includes an encoder configured to divide a first number of binary input bits of an input data signal into a first bit group and a second bit group, generate a first intermediate bit group and a second intermediate bit group by manipulating the first bit group and the second bit group differently based on a value of the first bit group, and generate a first symbol group and a second symbol group by encoding the first intermediate bit group and the second intermediate bit group, each of the first symbol group and the second symbol group including a plurality of symbols, and each of the plurality of symbols having three different voltage levels. The transmitter includes a driver configured to generate an output data signal by concatenating the first symbol group and the second symbol group.
| |
| | | | |
| | ===APPARATUS AND METHOD FOR SELECTING CELL IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18333118. APPARATUS AND METHOD FOR SELECTING CELL IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18333118]])=== | | ===APPARATUS AND METHOD FOR SELECTING CELL IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18333118. APPARATUS AND METHOD FOR SELECTING CELL IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18333118]])=== |
| Line 1,127: |
Line 665: |
| | Doyoung JUNG | | Doyoung JUNG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication system that supports higher data rates than the current 4G LTE system. It introduces an apparatus for a terminal in this wireless communication system, which includes a transceiver and a processor. The processor controls the transceiver to communicate through a specific cell, determined based on the strength of the received signal and the path diversity (PD) of that cell. The PD refers to the information about the different paths associated with the cell.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The present disclosure relates to a pre-5-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4-Generation (4G) communication system such as Long Term Evolution (LTE). An apparatus of a terminal in a wireless communication system is provided. The apparatus includes at least one transceiver and at least one processor operatively coupled to the at least one transceiver. The at least one processor is configured to control the transceiver to communicate through a cell determined based on information regarding a strength of a received signal for a first cell and a path diversity (PD) for the first cell. The PD comprises information regarding paths associated with the first cell.
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| | | | |
| | ===METHOD AND APPARATUS FOR CSI CODEBOOK PARAMETERS ([[US Patent Application 18298901. METHOD AND APPARATUS FOR CSI CODEBOOK PARAMETERS simplified abstract|18298901]])=== | | ===METHOD AND APPARATUS FOR CSI CODEBOOK PARAMETERS ([[US Patent Application 18298901. METHOD AND APPARATUS FOR CSI CODEBOOK PARAMETERS simplified abstract|18298901]])=== |
| Line 1,141: |
Line 673: |
| | Gilwon Lee | | Gilwon Lee |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes apparatuses and methods for channel state information (CSI) codebook parameters. It explains that a user equipment (UE) receives information about a CSI report, which includes details about multiple CSI reference signal (CSI-RS) resources and a codebook. The codebook consists of a spatial-domain (SD) basis component, a frequency-domain (FD) basis component, and a coefficient component. The SD basis component has L basis vectors for each CSI-RS resource, while the FD basis component has M basis vectors. The coefficient component contains coefficients associated with pairs of (SD, FD) basis vectors. The information received also includes codebook parameters. The method involves measuring the N CSI-RS resources based on the information, determining the SD basis component, FD basis component, and coefficient component based on the codebook parameters, and transmitting the CSI report.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Apparatuses and methods for channel state information (CSI) codebook parameters. A method performed by a user equipment (UE) includes receiving information about a channel state information (CSI) report, the information indicating N>1 CSI reference signal (CSI-RS) resources and a codebook. The codebook includes a spatial-domain (SD) basis component, a frequency-domain (FD) basis component, and a coefficient component. The SD basis component includes Lbasis vectors for each CSI-RS resource r=1, . . . , N. The FD basis component includes Mbasis vectors. The coefficient component includes coefficients associated with (SD, FD) basis vector pairs. The information includes codebook parameters. The method further includes, based on the information, measuring the N CSI-RS resources; determining, based on the codebook parameters, the SD basis component, the FD basis component, and the coefficient component; and transmitting the CSI report.
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| | | | |
| | ===RECONFIGURABLE INTELLIGENT SURFACES (RIS) ASSISTED LINE-OF-SIGHT (LOS) MULTIPLE-INPUT MULTIPLE-OUTPUT (MIMO) FOR RANGE EXTENSION AT TERAHERTZ (THZ) ([[US Patent Application 18167016. RECONFIGURABLE INTELLIGENT SURFACES (RIS) ASSISTED LINE-OF-SIGHT (LOS) MULTIPLE-INPUT MULTIPLE-OUTPUT (MIMO) FOR RANGE EXTENSION AT TERAHERTZ (THZ) simplified abstract|18167016]])=== | | ===RECONFIGURABLE INTELLIGENT SURFACES (RIS) ASSISTED LINE-OF-SIGHT (LOS) MULTIPLE-INPUT MULTIPLE-OUTPUT (MIMO) FOR RANGE EXTENSION AT TERAHERTZ (THZ) ([[US Patent Application 18167016. RECONFIGURABLE INTELLIGENT SURFACES (RIS) ASSISTED LINE-OF-SIGHT (LOS) MULTIPLE-INPUT MULTIPLE-OUTPUT (MIMO) FOR RANGE EXTENSION AT TERAHERTZ (THZ) simplified abstract|18167016]])=== |
| Line 1,155: |
Line 681: |
| | Sandy Saab | | Sandy Saab |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method implemented by a processor connected to a reconfigurable intelligent surface (RIS) system. The RIS system includes one or more RISs, which are capable of redirecting wireless signals. The method involves detecting wireless control signals from a transmitter and analyzing the channel state and phases of these signals. The beam-steering reflection matrix of the RIS system is then improved based on the analysis. The RIS system is configured based on this improved matrix. Each RIS in the system redirects the incident signal towards an antenna array of the intended receiver. The RIS and transmitter are located at different heights, with the RIS being a certain distance away from both the transmitter and the receiver in a horizontal plane.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method, implemented by a processor connected to a reconfigurable intelligent surface (RIS) system that includes one or more RISs, includes detecting one or more wireless control signals from a transmitter. The method includes identifying a channel state and one or more phases based on the detected wireless control signals; improving a beam-steering reflection matrix (Φ) of the RIS system based on a singular value decomposition of channel matrices; and configuring the RIS system based on the Φ. Among the RISs, each RIS is configured to redirect an incident signal toward an antenna array of an intended receiver. The incident signal is received from the transmitter. Locations of the RIS and transmitter differ by a height placement value (h). In a horizontal plane, the location of the RIS is a first distance (D) from the transmitter and a second distance (D) from the receiver.
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| | | | |
| | ===ELECTRONIC DEVICE AND METHOD FOR DETERMINING RF MODULE FOR BEAMFORMING THEREOF ([[US Patent Application 18347191. ELECTRONIC DEVICE AND METHOD FOR DETERMINING RF MODULE FOR BEAMFORMING THEREOF simplified abstract|18347191]])=== | | ===ELECTRONIC DEVICE AND METHOD FOR DETERMINING RF MODULE FOR BEAMFORMING THEREOF ([[US Patent Application 18347191. ELECTRONIC DEVICE AND METHOD FOR DETERMINING RF MODULE FOR BEAMFORMING THEREOF simplified abstract|18347191]])=== |
| Line 1,169: |
Line 689: |
| | Junsuk KIM | | Junsuk KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that has a wireless communication circuit with multiple radio frequency (RF) modules. The device also has a memory that stores reference values for classifying different areas within its cell. The device also includes a processor that can determine which RF module should monitor a broadcasting signal from a base station based on the received signal or the stored reference values. The processor can also determine the monitoring period and perform the monitoring using the chosen RF module.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An electronic device is provided. The electronic device includes a wireless communication circuit including a plurality of radio frequency (RF) modules, a memory configured to store a plurality of reference values for classifying a plurality of areas within a cell to which the electronic device belongs, and a processor, and the processor may be configured to determine, based on at least one of a first broadcasting signal received from a base station in the cell and the plurality of reference values stored in the memory, at least one RF module among the plurality of RF modules to monitor a second broadcasting signal transmitted from the base station and a period of the monitoring, and perform the monitoring by using the determined at least one RF module according to the determined period.
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| | | | |
| | ===METHOD AND APPRATUS FOR TRANSMITTING AND RECEIVING HYBRID AUTOMATIC RETRANSMISSION REQUEST ACKNOWLEDGEMENT INFORMATION IN A WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18297471. METHOD AND APPRATUS FOR TRANSMITTING AND RECEIVING HYBRID AUTOMATIC RETRANSMISSION REQUEST ACKNOWLEDGEMENT INFORMATION IN A WIRELESS COMMUNICATION SYSTEM simplified abstract|18297471]])=== | | ===METHOD AND APPRATUS FOR TRANSMITTING AND RECEIVING HYBRID AUTOMATIC RETRANSMISSION REQUEST ACKNOWLEDGEMENT INFORMATION IN A WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18297471. METHOD AND APPRATUS FOR TRANSMITTING AND RECEIVING HYBRID AUTOMATIC RETRANSMISSION REQUEST ACKNOWLEDGEMENT INFORMATION IN A WIRELESS COMMUNICATION SYSTEM simplified abstract|18297471]])=== |
| Line 1,183: |
Line 697: |
| | Jingxing FU | | Jingxing FU |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a communication system, specifically for 5G or 6G networks, that supports high-speed data transmission. It introduces a method and apparatus for transmitting hybrid automatic retransmission request acknowledgement (HARQ-ACK) information. The method involves a user equipment (UE) in a wireless communication system determining the HARQ-ACK information, deciding the transmission power for an uplink channel to send the HARQ-ACK information, and transmitting the uplink channel based on the chosen transmission power.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The disclosure relates to a fifth-generation (5G) or sixth-generation (6G) communication system for supporting a higher data transmission rate. A method and an apparatus for transmitting hybrid automatic retransmission request acknowledgement (HARQ-ACK) information are provided. A method performed by a user equipment (UE) in a wireless communication system is provided. The method includes determining HARQ-ACK information, determining transmission power of an uplink channel for transmitting the HARQ-ACK information, and transmitting the uplink channel according to the transmission power.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR DOWNLINK AND UPLINK CARRIER-PHASE REPORTING ([[US Patent Application 18300304. METHOD AND APPARATUS FOR DOWNLINK AND UPLINK CARRIER-PHASE REPORTING simplified abstract|18300304]])=== | | ===METHOD AND APPARATUS FOR DOWNLINK AND UPLINK CARRIER-PHASE REPORTING ([[US Patent Application 18300304. METHOD AND APPARATUS FOR DOWNLINK AND UPLINK CARRIER-PHASE REPORTING simplified abstract|18300304]])=== |
| Line 1,197: |
Line 705: |
| | Emad N. Farag | | Emad N. Farag |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method and apparatus for reporting carrier-phase information in a wireless communication system. In this method, a user equipment (UE) receives multiple downlink positioning reference signals (PRSs) from a base station using multiple antennas. The UE then measures the carrier phase differences between the received PRSs from adjacent pairs of antennas. These PRSs are received in separate resources and there are more than one antenna used (N>1). Based on these measured carrier phase differences, the UE determines a first carrier phase difference to report to the network.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Apparatuses and methods for an uplink carrier-phase reporting. A method of operating a user equipment (UE) includes receiving, from N antennas of a base station, N downlink (DL) positioning reference signals (PRSs), respectively, and measuring carrier phase differences of the received DL PRSs corresponding to adjacent pairs of the N antennas. The DL PRSs are received in orthogonal resources and N>1. The method further includes determining a first carrier phase difference to report based on the measured carrier phase differences and reporting the first carrier phase difference to a network.
| |
| | | | |
| | ===METHOD AND APPARATUS TRANSMITTING SIGNAL FOR HIGH SPEED MOBILE TERMINAL IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 17917406. METHOD AND APPARATUS TRANSMITTING SIGNAL FOR HIGH SPEED MOBILE TERMINAL IN WIRELESS COMMUNICATION SYSTEM simplified abstract|17917406]])=== | | ===METHOD AND APPARATUS TRANSMITTING SIGNAL FOR HIGH SPEED MOBILE TERMINAL IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 17917406. METHOD AND APPARATUS TRANSMITTING SIGNAL FOR HIGH SPEED MOBILE TERMINAL IN WIRELESS COMMUNICATION SYSTEM simplified abstract|17917406]])=== |
| Line 1,211: |
Line 713: |
| | Hyoungju JI | | Hyoungju JI |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication technique that combines IoT technology with a 5G communication system to achieve faster data transmission rates compared to the previous 4G system. This technique can be used in various intelligent services such as smart homes, smart buildings, smart cities, smart cars, healthcare, digital education, retail, security, and safety services. The abstract also mentions a method and device for transmitting and receiving a reference signal in a wireless communication system to optimize resource usage.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The present disclosure relates to a communication technique merging IoT technology with a 5G communication system for supporting a data transmission rate higher than that of a 4G system; and a system therefor. The present disclosure can be applied to intelligent services (for example, smart homes, smart buildings, smart cities, smart cars or connected cars, healthcare, digital education, retail, security- and safety-related services, and the like) on the basis of 5G communication technology and IoT-related technology. The present disclosure presents a method and device transmitting/receiving a reference signal for efficiently using resources in a wireless communication system.
| |
| | | | |
| | ===METHOD AND DEVICE FOR HARQ-ACK FEEDBACK TRANSMISSION OR RECEPTION FOR NETWORK COOPERATIVE COMMUNICATION ([[US Patent Application 18338029. METHOD AND DEVICE FOR HARQ-ACK FEEDBACK TRANSMISSION OR RECEPTION FOR NETWORK COOPERATIVE COMMUNICATION simplified abstract|18338029]])=== | | ===METHOD AND DEVICE FOR HARQ-ACK FEEDBACK TRANSMISSION OR RECEPTION FOR NETWORK COOPERATIVE COMMUNICATION ([[US Patent Application 18338029. METHOD AND DEVICE FOR HARQ-ACK FEEDBACK TRANSMISSION OR RECEPTION FOR NETWORK COOPERATIVE COMMUNICATION simplified abstract|18338029]])=== |
| Line 1,225: |
Line 721: |
| | Euichang JUNG | | Euichang JUNG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract discusses a communication system, specifically 5G or 6G, that supports high data transmission rates. It can be used in various applications such as smart homes, buildings, cities, cars, healthcare, education, retail, and security services. The abstract also mentions a method and device for transmitting and receiving feedback information in a wireless communication system. This feedback information is sent by a terminal to multiple transmission points, panels, or beams for network coordination.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The disclosure relates to a 5th generation (5G) or 6th generation (6G) communication system for supporting a higher data transmission rate. The disclosure may be applied to intelligence services (for example, smart homes, smart buildings, smart cities, smart cars or connected cars, healthcare, digital education, retail businesses, security and safety related services, etc.) on the basis of a 5G communication technology and an IoT-related technology. A method and a device for transmitting or receiving HARQ-ACK feedback information by a terminal in a wireless communication system are provided. The method and device include transmitting, for network cooperative communication (network coordination), HARQ-ACK feedback information to multiple transmission points, panels, or beams by a terminal.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR TRANSMITTING/RECEIVING UPLINK DATA REPETITIONS FOR NETWORK COOPERATIVE COMMUNICATIONS ([[US Patent Application 18007422. METHOD AND APPARATUS FOR TRANSMITTING/RECEIVING UPLINK DATA REPETITIONS FOR NETWORK COOPERATIVE COMMUNICATIONS simplified abstract|18007422]])=== | | ===METHOD AND APPARATUS FOR TRANSMITTING/RECEIVING UPLINK DATA REPETITIONS FOR NETWORK COOPERATIVE COMMUNICATIONS ([[US Patent Application 18007422. METHOD AND APPARATUS FOR TRANSMITTING/RECEIVING UPLINK DATA REPETITIONS FOR NETWORK COOPERATIVE COMMUNICATIONS simplified abstract|18007422]])=== |
| Line 1,239: |
Line 729: |
| | Seongmok LIM | | Seongmok LIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method in a communication system where a terminal receives configuration information for two sets of SRS resources. The terminal also receives a DCI from a base station indicating either a first or second SRI on a PDCCH. Based on the SRI indicated by the DCI, the terminal performs repetition of PUSCH transmission using the corresponding SRS resource set. The first SRI is associated with the most recent transmission before the PDCCH of the SRS resource identified by the first SRI in the first SRS resource set, and the second SRI is associated with the most recent transmission before the PDCCH of the SRS resource identified by the second SRI in the second SRS resource set.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The present disclosure relates to a 5G or 6G communication system for supporting higher data transmission rates. According to an embodiment of the present disclosure, provided is a method performed in a communication system by a terminal. The method is characterized by comparing the steps of: receiving an RRC message comprising configuration information for a first SRS resource set and a second SRS resource set; receiving, from a base station, a DCI for indicating at least one of a first SRI or a second SRI on a PDCCH; and performing repetition of PUSCH transmission on the basis of at least one of the SRI indicated by the DCI, the first SRS resource set, or the second SRS resource set, wherein the first SRI is associated with the most recent transmission before the PDCCH of the SRS resource identified by the first SRI in the first SRS resource set, and the second SRI is associated with the most recent transmission before the PDCCH of the SRS resource identified by the second SRI in the second SRS resource set.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR CONFIGURING DEMODULATION REFERENCE SIGNAL INFORMATION IN WIRELESS CELLULAR COMMUNICATION SYSTEM ([[US Patent Application 18335555. METHOD AND APPARATUS FOR CONFIGURING DEMODULATION REFERENCE SIGNAL INFORMATION IN WIRELESS CELLULAR COMMUNICATION SYSTEM simplified abstract|18335555]])=== | | ===METHOD AND APPARATUS FOR CONFIGURING DEMODULATION REFERENCE SIGNAL INFORMATION IN WIRELESS CELLULAR COMMUNICATION SYSTEM ([[US Patent Application 18335555. METHOD AND APPARATUS FOR CONFIGURING DEMODULATION REFERENCE SIGNAL INFORMATION IN WIRELESS CELLULAR COMMUNICATION SYSTEM simplified abstract|18335555]])=== |
| Line 1,253: |
Line 737: |
| | Cheolkyu SHIN | | Cheolkyu SHIN |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication method and system that combines 5G technology with Internet of Things (IoT) technology to achieve higher data rates than the previous 4G system. The method involves a User Equipment (UE) receiving configuration information and downlink control information from a base station. The UE then identifies information on the duration of a scheduled physical downlink shared channel (PDSCH) resource and the position of a demodulation reference signal (DMRS) symbol based on the received information. Finally, the UE receives at least one DMRS based on the identified position.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The present disclosure relates to a communication method and system for converging a 5th generation (5G) communication system with a technology for Internet of Things (IoT) to support higher data rates beyond a 4th generation (4G) system. A method of a UE is provided. The method includes receiving, from a base station, configuration information including first information on a number of an additional demodulation reference signal (DMRS) symbol by higher layer signaling, receiving, from the base station, downlink control information (DCI) including second information on a time domain resource, identifying third information on a duration in symbols of a scheduled physical downlink shared channel (PDSCH) resource based on the second information, identifying a position of a DMRS symbol based on the first information and the third information, and receiving, from the base station, at least one DMRS based on the position of the DMRS symbol.
| |
| | | | |
| | ===REAL-TIME DC-BALANCE AWARE AFE OFFSET CANCELLATION ([[US Patent Application 17885001. REAL-TIME DC-BALANCE AWARE AFE OFFSET CANCELLATION simplified abstract|17885001]])=== | | ===REAL-TIME DC-BALANCE AWARE AFE OFFSET CANCELLATION ([[US Patent Application 17885001. REAL-TIME DC-BALANCE AWARE AFE OFFSET CANCELLATION simplified abstract|17885001]])=== |
| Line 1,267: |
Line 745: |
| | Anup P. JOSE | | Anup P. JOSE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a receiver for a serial data link. It includes an analog front end (AFE) with a continuous-time linear equalizer (CTLE) that receives a signal from a transmitter. The CTLE has two output nodes, and there are programmable tail current sources that can adjust the direct current (DC) offset between these nodes. The receiver also has a calibration circuit, which consists of a slicer that calculates the difference between the average output voltages of the two nodes, and a calibration counter that increments or decrements an offset count based on this difference. The programmable tail current sources are then adjusted according to the value of the offset count.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A receiver for a serial data link, including an analog front end (AFE) including a continuous-time linear equalizer (CTLE) configured to receive an input signal from a transmitter, the CTLE including a first output node; a second output node; a plurality of programmable tail current sources configured to adjust a direct current (DC) offset between the first output node and the second output node; and a calibration circuit including: a slicer configured to output a difference between a first average output voltage corresponding to the first output node and a second average output, voltage corresponding to the second output node; and a calibration counter configured to increment or decrement an offset count based on the difference, wherein the plurality of programmable tail current sources are adjusted based on a value of the offset count.
| |
| | | | |
| | ===IMAGE ENCODING AND DECODING METHOD USING BIDIRECTIONAL PREDICTION, AND IMAGE ENCODING AND DECODING APPARATUS ([[US Patent Application 18346685. IMAGE ENCODING AND DECODING METHOD USING BIDIRECTIONAL PREDICTION, AND IMAGE ENCODING AND DECODING APPARATUS simplified abstract|18346685]])=== | | ===IMAGE ENCODING AND DECODING METHOD USING BIDIRECTIONAL PREDICTION, AND IMAGE ENCODING AND DECODING APPARATUS ([[US Patent Application 18346685. IMAGE ENCODING AND DECODING METHOD USING BIDIRECTIONAL PREDICTION, AND IMAGE ENCODING AND DECODING APPARATUS simplified abstract|18346685]])=== |
| Line 1,281: |
Line 753: |
| | Seungsoo JEONG | | Seungsoo JEONG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The disclosed method is for decoding images and involves obtaining two reference blocks for predicting a current block. Weight information is obtained from a bitstream to combine the reference blocks. Entropy decoding is performed on the weight information to obtain a weight index. The first reference block is combined with the second reference block based on a candidate value indicated by the weight index. The current block is then reconstructed based on the combined result. The weight index is entropy-decoded using a context model, while the remaining binary value is entropy-decoded using a bypass method.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Disclosed is an image decoding method according to an embodiment, the image decoding method including: obtaining a first reference block and a second reference block, for bi-directional prediction of a current block; obtaining, from a bitstream, weight information for combining the first reference block with the second reference block; performing entropy decoding on the weight information to obtain a weight index; combining the first reference block with the second reference block according to a candidate value indicated by the weight index among candidate values included in a weight candidate group; and reconstructing the current block based on a result of the combining, wherein a first binary value corresponding to the weight index is entropy-decoded based on a context model, and the remaining binary value corresponding to the weight index is entropy-decoded by a bypass method.
| |
| | | | |
| | ===METHOD AND DEVICE FOR CONTROLLING TRANSMISSION OR RECEPTION OF DATA IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18013756. METHOD AND DEVICE FOR CONTROLLING TRANSMISSION OR RECEPTION OF DATA IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18013756]])=== | | ===METHOD AND DEVICE FOR CONTROLLING TRANSMISSION OR RECEPTION OF DATA IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18013756. METHOD AND DEVICE FOR CONTROLLING TRANSMISSION OR RECEPTION OF DATA IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18013756]])=== |
| Line 1,295: |
Line 761: |
| | Sungryeul RHYU | | Sungryeul RHYU |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This disclosure describes a method and device for controlling the transmission and reception of data in a wireless communication system. The method involves capturing a point cloud by taking pictures of an object. A message containing parameters for transmitting and receiving the point cloud is sent to a receiving device. These parameters can include information about the direction of the object or spatial parameters associated with the object. The receiving device responds with a message containing its application parameters, which are determined based on the received parameters and the channel state of the receiving device. The point cloud is then compressed based on the application parameters and transmitted to the receiving device.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The present disclosure relates to a method and device for controlling transmission or reception of data in a wireless communication system, an operating method of a transmission user equipment (UE) in a wireless communication system including: obtaining a point cloud by photographing an object; transmitting, to a reception UE, a message including a parameter for transmission and reception of the point cloud, wherein the parameter for transmission and reception of the point cloud includes at least one of a parameter associated with a direction of the object or a space parameter associated with the object; receiving, from the reception UE, a response message including an application parameter of the reception UE, wherein the application parameter of the reception UE is determined based on the parameter for transmission and reception of the point cloud and a channel state of the reception UE; compressing the point cloud, based on the application parameter of the reception UE, and transmitting, to the reception UE, the compressed point cloud.
| |
| | | | |
| | ===VIDEO SIGNAL PROCESSING METHOD AND APPARATUS USING SECONDARY TRANSFORM ([[US Patent Application 18341936. VIDEO SIGNAL PROCESSING METHOD AND APPARATUS USING SECONDARY TRANSFORM simplified abstract|18341936]])=== | | ===VIDEO SIGNAL PROCESSING METHOD AND APPARATUS USING SECONDARY TRANSFORM ([[US Patent Application 18341936. VIDEO SIGNAL PROCESSING METHOD AND APPARATUS USING SECONDARY TRANSFORM simplified abstract|18341936]])=== |
| Line 1,309: |
Line 769: |
| | Jaehong JUNG | | Jaehong JUNG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a video signal decoding apparatus that includes a processor. The processor is designed to perform certain tasks related to decoding a video signal. It parses a syntax element that is associated with a secondary transform of a coding unit. The parsing is based on whether the prediction method of the coding unit is MIP (Matrix based Intra Prediction). The processor then checks whether the secondary transform is applied to a transform block within the coding unit, using the parsed syntax element. If the secondary transform is applied, the processor obtains one or more inverse transform coefficients by performing an inverse transform of the secondary transform. Finally, the processor obtains a residual sample for the transform block based on the obtained inverse transform coefficients.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A video signal decoding apparatus, comprising a processor, wherein the processor is configured to: parse a syntax element related to a secondary transform of a coding unit based on whether a prediction method of the coding unit is MIP (Matrix based Intra Prediction), check whether or not the secondary transform is applied to a transform block included in the coding unit based on the parsed syntax element, obtain one or more inverse transform coefficients based on an inverse transform of the secondary transform when the secondary transform is applied to the transform block, obtain a residual sample for the transform block based on the one or more inverse transform coefficients.
| |
| | | | |
| | ===VIDEO SIGNAL PROCESSING METHOD AND APPARATUS USING SECONDARY TRANSFORM ([[US Patent Application 18341983. VIDEO SIGNAL PROCESSING METHOD AND APPARATUS USING SECONDARY TRANSFORM simplified abstract|18341983]])=== | | ===VIDEO SIGNAL PROCESSING METHOD AND APPARATUS USING SECONDARY TRANSFORM ([[US Patent Application 18341983. VIDEO SIGNAL PROCESSING METHOD AND APPARATUS USING SECONDARY TRANSFORM simplified abstract|18341983]])=== |
| Line 1,323: |
Line 777: |
| | Jaehong JUNG | | Jaehong JUNG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a video signal decoding apparatus that includes a processor. The processor is designed to perform several tasks. Firstly, it parses a syntax element that is related to a secondary transform of a coding unit. This parsing is based on whether the prediction method of the coding unit is MIP (Matrix based Intra Prediction). Then, it checks whether the secondary transform is applied to a transform block within the coding unit, based on the parsed syntax element. If the secondary transform is applied, the processor obtains one or more inverse transform coefficients through an inverse transform of the secondary transform. Finally, the processor obtains a residual sample for the transform block using the obtained inverse transform coefficients.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A video signal decoding apparatus, comprising a processor, wherein the processor is configured to: parse a syntax element related to a secondary transform of a coding unit based on whether a prediction method of the coding unit is MIP (Matrix based Intra Prediction), check whether or not the secondary transform is applied to a transform block included in the coding unit based on the parsed syntax element, obtain one or more inverse transform coefficients based on an inverse transform of the secondary transform when the secondary transform is applied to the transform block, obtain a residual sample for the transform block based on the one or more inverse transform coefficients.
| |
| | | | |
| | ===ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF ([[US Patent Application 18216295. ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF simplified abstract|18216295]])=== | | ===ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF ([[US Patent Application 18216295. ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF simplified abstract|18216295]])=== |
| Line 1,337: |
Line 785: |
| | Seongwoo OH | | Seongwoo OH |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes an electronic device that has a camera with two lenses, a display, a memory, and a processor. The processor is programmed to perform a controlling method. It provides a live view on the display using the first lens, captures an image using the second lens, and analyzes the image using neural network models to gather information about the objects in the image. Based on this information, it identifies the type of screen in the image and selects a set of filters that correspond to that screen type. The processor then corrects the live view image using the identified filters to provide an improved live view.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An electronic apparatus includes a camera including a first lens and a second lens capable of obtaining an image having an angle of view different from the first lens, a display, a memory, and a processor. To perform a controlling method, the processor is configured to provide a first image obtained using the first lens to the display as a live view, obtain a second image using the second lens, obtain image information regarding the second image and object information regarding at least one object depicted in the second image using at least one neural network model, identify a screen type of the second image based on the image information and the object information, identify a set of filters corresponding to the screen type of the second image, and correct the first image based on the identified set of filters to provide a corrected first image as the live view.
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| | | | |
| | ===ANALOG-TO-DIGITAL CONVERTING CIRCUIT FOR DECREASING DECISION DELAY AND OPERATION METHOD THEREOF ([[US Patent Application 18062853. ANALOG-TO-DIGITAL CONVERTING CIRCUIT FOR DECREASING DECISION DELAY AND OPERATION METHOD THEREOF simplified abstract|18062853]])=== | | ===ANALOG-TO-DIGITAL CONVERTING CIRCUIT FOR DECREASING DECISION DELAY AND OPERATION METHOD THEREOF ([[US Patent Application 18062853. ANALOG-TO-DIGITAL CONVERTING CIRCUIT FOR DECREASING DECISION DELAY AND OPERATION METHOD THEREOF simplified abstract|18062853]])=== |
| Line 1,351: |
Line 793: |
| | Daehwa Paik | | Daehwa Paik |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a circuit that converts analog signals to digital signals. It consists of two amplifiers. The first amplifier compares a signal from a pixel array with a ramp signal and produces an output signal. The second amplifier generates a second output signal based on the first output signal. It includes several components such as transistors, a capacitor, and a current source. These components work together to provide power supply voltage, control the turning on and off of certain elements, and generate a power current.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An analog-to-digital converting circuit includes a first amplifier configured to output a first output signal by comparing a pixel signal output from a pixel array with a ramp signal, and a second amplifier configured to generate a second output signal based on the first output signal. The second amplifier includes a first transistor configured to provide a power supply voltage to a first output node in response to the first output signal, a second transistor connected with a capacitor through a bias node, wherein the second transistor is configured to turn on in response to an auto-zero signal, a current source connected with the first transistor through the first output node, the current source configured to generate a power current based on a voltage level of the bias node, and a third transistor connected with the current source.
| |
| | | | |
| | ===ELECTRONIC SYSTEM FOR ELECTRONIC DEVICE ([[US Patent Application 18214677. ELECTRONIC SYSTEM FOR ELECTRONIC DEVICE simplified abstract|18214677]])=== | | ===ELECTRONIC SYSTEM FOR ELECTRONIC DEVICE ([[US Patent Application 18214677. ELECTRONIC SYSTEM FOR ELECTRONIC DEVICE simplified abstract|18214677]])=== |
| Line 1,365: |
Line 801: |
| | Woo Young CHOI | | Woo Young CHOI |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that has a specific type of circuit called narrowband internet of things (NB-IoT). This circuit is controlled by a shared central processor, which also manages a shared memory for storing data or code. The device also includes a communicator that is controlled by the central processor and is responsible for storing the data or code in the shared memory.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An electronic device includes a narrowband internet of things (NB-IoT) circuit; a shared central processor to control the narrowband internet of things circuit; a shared memory to store data or code from the shared central processor; and a communicator controlled by the shared central processor. The communicator stores the data or the code in the shared memory.
| |
| | | | |
| | ===METHOD OF OPERATING SNIFFING-BASED STATUS DETECTION AND NOTIFICATION SYSTEM, AND METHOD OF OPERATING ELECTRONIC DEVICE INCLUDED THEREIN ([[US Patent Application 18121136. METHOD OF OPERATING SNIFFING-BASED STATUS DETECTION AND NOTIFICATION SYSTEM, AND METHOD OF OPERATING ELECTRONIC DEVICE INCLUDED THEREIN simplified abstract|18121136]])=== | | ===METHOD OF OPERATING SNIFFING-BASED STATUS DETECTION AND NOTIFICATION SYSTEM, AND METHOD OF OPERATING ELECTRONIC DEVICE INCLUDED THEREIN ([[US Patent Application 18121136. METHOD OF OPERATING SNIFFING-BASED STATUS DETECTION AND NOTIFICATION SYSTEM, AND METHOD OF OPERATING ELECTRONIC DEVICE INCLUDED THEREIN simplified abstract|18121136]])=== |
| Line 1,379: |
Line 809: |
| | Wondeuk YOON | | Wondeuk YOON |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for operating an electronic device to establish communication with another device. The electronic device sends a request to establish a communication link with the other device. Once the link is established, the electronic device receives information about a second communication link between the other device and a third device. The electronic device then monitors the communication between the other two devices based on this information. If a certain condition is met, the electronic device generates a notification signal.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | In a method of operating an electronic device configured to communicate with a first external electronic device, a first communication link establishment request for establishing a first communication link between the electronic device and the first external electronic device is transmitted to the first external electronic device. Based on establishment of the first communication link, first link information, associated with a second communication link between the first external electronic device and a second external electronic device, is received from the first external electronic device. A first communication packet exchanged between the first external electronic device and the second external electronic device is sniffed based on the first link information. A first notification signal is generated based on a condition being met, the condition being met based on the sniffed first communication packet.
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| | | | |
| | ===ELECTRONIC DEVICE PERFORMING WIRELESS COMMUNICATION WITH ACCESSORY DEVICE, AND OPERATING METHOD THEREOF ([[US Patent Application 18215502. ELECTRONIC DEVICE PERFORMING WIRELESS COMMUNICATION WITH ACCESSORY DEVICE, AND OPERATING METHOD THEREOF simplified abstract|18215502]])=== | | ===ELECTRONIC DEVICE PERFORMING WIRELESS COMMUNICATION WITH ACCESSORY DEVICE, AND OPERATING METHOD THEREOF ([[US Patent Application 18215502. ELECTRONIC DEVICE PERFORMING WIRELESS COMMUNICATION WITH ACCESSORY DEVICE, AND OPERATING METHOD THEREOF simplified abstract|18215502]])=== |
| Line 1,393: |
Line 817: |
| | Minkyu KIM | | Minkyu KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method and electronic devices for wireless communication with an accessory device. The electronic device includes a wireless communication circuit, memory, and a processor. The processor is responsible for executing instructions to receive a decryption key from a server through the wireless communication circuit. It also receives an advertising packet from the accessory device, where a portion of the packet is encrypted with an encryption key. The processor decrypts the encrypted portion of the packet using the decryption key and then transmits the information from the decrypted advertising packet back to the server. The decryption key corresponds to the encryption key used.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The present disclosure provides methods and electronic devices for performing wireless communication with an accessory device. In some embodiments, an electronic device includes a wireless communication circuit, a memory, and a processor. The processor is configured to execute instructions to receive, from at least one server through the wireless communication circuit, a first decryption key. The processor is further configured to receive, from an accessory device through the wireless communication circuit, an advertising packet. At least one portion of the advertising packet is encrypted with a first encryption key. The processor is further configured to decrypt the at least one portion of the advertising packet with the first decryption key. The processor is further configured to transmit, to the at least one server through the wireless communication circuit, information comprised in the decrypted advertising packet. The first decryption key corresponds to the first encryption key.
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| | | | |
| | ===METHOD AND APPARATUS FOR RESOURCE MAPPING OF PDSCH ON UNLICENSED SPECTRUM ([[US Patent Application 18344763. METHOD AND APPARATUS FOR RESOURCE MAPPING OF PDSCH ON UNLICENSED SPECTRUM simplified abstract|18344763]])=== | | ===METHOD AND APPARATUS FOR RESOURCE MAPPING OF PDSCH ON UNLICENSED SPECTRUM ([[US Patent Application 18344763. METHOD AND APPARATUS FOR RESOURCE MAPPING OF PDSCH ON UNLICENSED SPECTRUM simplified abstract|18344763]])=== |
| Line 1,407: |
Line 825: |
| | Hongbo Si | | Hongbo Si |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method and apparatus for accessing shared spectrum channels in a wireless communication system. The system receives a set of downlink channels that support shared spectrum channel access. It then identifies a window for transmitting SS/PBCH blocks, a bitmap for the positions of these blocks, and a parameter for QCL assumption Q. Based on these identifications, the system determines whether a specific SS/PBCH block is assumed to be transmitted by the base station (BS) or not. It also determines a set of resources that are not available for at least one PDSCH (Physical Downlink Shared Channel) due to overlap with the first set of SS/PBCH blocks. Finally, the system receives the PDSCH using resources other than the determined set.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method and apparatus in a wireless communication system supporting shared spectrum channel access is provided. The method and apparatus comprises: receiving a set of downlink channels supporting the shared spectrum channel access; identifying, a window for SS/PBCH block transmission, a bitmap for SS/PBCH blocks (ssb-PositionsInBurst), and a parameter for QCL assumption Q; determining, based on the identified window for the SS/PBCH block transmission, the identified bitmap for the ssb-PositionsInBurst, and the identified parameter for the QCL assumption Q, a SS/PBCH block as one of: a first set of SS/PBCH blocks assumed to be transmitted by the BS, or a second set of SS/PBCH blocks not transmitted by the BS; determining a set of resources that is not available for at least one PDSCH as overlapped with the first set of SS/PBCH blocks; and receiving the at least one PDSCH based on resource other than the determined set of resources.
| |
| | | | |
| | ===METHODS PERFORMED BY RECEIVER AND TRANSMITTER IN COMMUNICATION SYSTEM AND DEVICES ([[US Patent Application 18137687. METHODS PERFORMED BY RECEIVER AND TRANSMITTER IN COMMUNICATION SYSTEM AND DEVICES simplified abstract|18137687]])=== | | ===METHODS PERFORMED BY RECEIVER AND TRANSMITTER IN COMMUNICATION SYSTEM AND DEVICES ([[US Patent Application 18137687. METHODS PERFORMED BY RECEIVER AND TRANSMITTER IN COMMUNICATION SYSTEM AND DEVICES simplified abstract|18137687]])=== |
| Line 1,421: |
Line 833: |
| | Pengru LI | | Pengru LI |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication system, specifically for 5G or 6G, that aims to support faster data transmission rates. The system includes methods and devices for transmitting configuration information of a reference signal used for carrier phase-based positioning from a transmitter to a receiver. The transmitter also sends the reference signal to the receiver, and then receives a measurement result based on that reference signal from the receiver.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. Methods and devices are provided in a communication system. A method performed by a transmitter in a communication system. Configuration information of a reference signal for carrier phase-based positioning is transmitted to a receiver. The reference signal for carrier phase-based positioning is transmitted to the receiver. A measurement result that is based on the reference signal for carrier phase-based positioning is received from the receiver.
| |
| | | | |
| | ===SYSTEMS AND METHODS TO PRIORITIZE CELLS BASED ON RELAXED MEASUREMENT ([[US Patent Application 18338784. SYSTEMS AND METHODS TO PRIORITIZE CELLS BASED ON RELAXED MEASUREMENT simplified abstract|18338784]])=== | | ===SYSTEMS AND METHODS TO PRIORITIZE CELLS BASED ON RELAXED MEASUREMENT ([[US Patent Application 18338784. SYSTEMS AND METHODS TO PRIORITIZE CELLS BASED ON RELAXED MEASUREMENT simplified abstract|18338784]])=== |
| Line 1,435: |
Line 841: |
| | Gokul Nishant | | Gokul Nishant |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a system and method for prioritizing cells in a mobile network based on relaxed measurements. This prioritization occurs during various processes such as cell selection, redirection, mobility, and handovers. The system allows user equipment (UE) to prioritize cells that support relaxed measurements, which are indicated in a broadcast message. This prioritization occurs in both idle and connected states of the network.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The disclosure relates to systems and methods for prioritizing cells based on relaxed measurements during cell selection/reselection, redirection, mobility from EUTRA command, conditional handovers, and dual active protocol stack (DAPS) handovers. For example, the disclosure relates to facilitating UEs to prioritize NR cells that support relaxed measurements based on relaxedMeasurement-r16 IE broadcasted in SIB2 message during cell selection/reselection in RRC idle or inactive state and further during DAPS handover and conditional handover in RRC connected state.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR SUPPORTING NETWORK SLICE WHEN UE MOVES BETWEEN 4G AND 5G NETWORKS ([[US Patent Application 18346002. METHOD AND APPARATUS FOR SUPPORTING NETWORK SLICE WHEN UE MOVES BETWEEN 4G AND 5G NETWORKS simplified abstract|18346002]])=== | | ===METHOD AND APPARATUS FOR SUPPORTING NETWORK SLICE WHEN UE MOVES BETWEEN 4G AND 5G NETWORKS ([[US Patent Application 18346002. METHOD AND APPARATUS FOR SUPPORTING NETWORK SLICE WHEN UE MOVES BETWEEN 4G AND 5G NETWORKS simplified abstract|18346002]])=== |
| Line 1,449: |
Line 849: |
| | Jungshin PARK | | Jungshin PARK |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication method and system that combines 5G technology with Internet of Things (IoT) technology to support higher data rates and enable intelligent services. This includes applications such as smart home, smart building, smart city, smart car, health care, digital education, smart retail, and security services. The method also involves supporting network slices and user equipment (UE) when transitioning between 4G and 5G networks in the 3GPP 5G network technology.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The present disclosure relates to a communication method and system for converging a 5-Generation (5G) communication system for supporting higher data rates beyond a 4-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. The present disclosure relates to a method of supporting a network slice of a network and a user equipment (UE) when the UE moves between a 4G network and a 5G network in the 3GPP 5G network technology.
| |
| | | | |
| | ===APPARATUS AND METHOD OF IDENTIFYING DOWNLINK TRANSMISSION BEAM IN A CELLULAR NETWORK ([[US Patent Application 18345669. APPARATUS AND METHOD OF IDENTIFYING DOWNLINK TRANSMISSION BEAM IN A CELLULAR NETWORK simplified abstract|18345669]])=== | | ===APPARATUS AND METHOD OF IDENTIFYING DOWNLINK TRANSMISSION BEAM IN A CELLULAR NETWORK ([[US Patent Application 18345669. APPARATUS AND METHOD OF IDENTIFYING DOWNLINK TRANSMISSION BEAM IN A CELLULAR NETWORK simplified abstract|18345669]])=== |
| Line 1,463: |
Line 857: |
| | Anil AGIWAL | | Anil AGIWAL |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a communication method and system that combines fifth generation (5G) technology with internet of things (IoT) technology. It aims to support higher data rates than the previous fourth generation (4G) system. The system includes intelligent services such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security, and safety services. The abstract also mentions specific methods and apparatus for transmitting a random access preamble and requesting/transmitting system information in a wireless communication system.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A communication method and system for converging a fifth generation (5G) communication system for supporting higher data rates beyond a fourth generation (4G) system with a technology for internet of things (IoT) are provided. The communication method and system includes intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. In accordance with an aspect of the disclosure, a method and an apparatus for transmitting a random access preamble in a wireless communication system are provided. In accordance with another aspect of the disclosure, a method and an apparatus for requesting and transmitting system information are provided.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR OPTIMIZING WIRELESS SERVICE UTILIZATION BY USER EQUIPMENT ([[US Patent Application 18138631. METHOD AND APPARATUS FOR OPTIMIZING WIRELESS SERVICE UTILIZATION BY USER EQUIPMENT simplified abstract|18138631]])=== | | ===METHOD AND APPARATUS FOR OPTIMIZING WIRELESS SERVICE UTILIZATION BY USER EQUIPMENT ([[US Patent Application 18138631. METHOD AND APPARATUS FOR OPTIMIZING WIRELESS SERVICE UTILIZATION BY USER EQUIPMENT simplified abstract|18138631]])=== |
| Line 1,477: |
Line 865: |
| | Koustav ROY | | Koustav ROY |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method for communication in a wireless communication system. The method involves a user equipment (UE) sending a request message to access a data service and a voice service to a specific type of network. The UE then receives a response message indicating that the request to establish an internet connection with that network has been rejected. The UE then determines an alternative network to access the data service or both the data service and the voice service. This alternative network can be either a different type of network within the same public land mobile network (PLMN) or a network in a different PLMN.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method for communication by a UE in a wireless communication system is provided. The method may comprise sending a first request message to access a data service over a first NSSAI and a voice service over a second NSSAI to a first 3GPP RAT of a first PLMN; receiving a first response message indicating a rejection for establishing an internet PDU session with the first 3GPP RAT of the first PLMN; and determining, for accessing the data service or both the data service and the voice service, one of a second 3GPP RAT of the first PLMN, the first 3GPP RAT of a second PLMN, a N3GPP RAT of the second PLMN, or an N3GPP RAT of the first PLMN
| |
| | | | |
| | ===RESTRICTED TWT WITH ENHANCED MULTI-LINK SINGLE RADIO (EMLSR) OPERATION ([[US Patent Application 18343060. RESTRICTED TWT WITH ENHANCED MULTI-LINK SINGLE RADIO (EMLSR) OPERATION simplified abstract|18343060]])=== | | ===RESTRICTED TWT WITH ENHANCED MULTI-LINK SINGLE RADIO (EMLSR) OPERATION ([[US Patent Application 18343060. RESTRICTED TWT WITH ENHANCED MULTI-LINK SINGLE RADIO (EMLSR) OPERATION simplified abstract|18343060]])=== |
| Line 1,491: |
Line 873: |
| | Rubayet Shafin | | Rubayet Shafin |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a system where multiple devices called STAs are connected to an AP (Access Point) in a network. These STAs have transceivers to communicate with the AP and processors to handle data. The system establishes a schedule called R-TWT (Restricted Target Wake Time) on one link, where one STA is part of a specific service period. Another STA on a different link is not part of any overlapping service period. The processor then transitions the network into EMLSR (Enhanced Multi-Link Service Reliability) operation, where the first and second links form a pair. It detects when a transmission opportunity (TXOP) starts on the second link and coordinates between the STAs to ensure that a frame exchange sequence with the AP on the second link does not overlap with the R-TWT service period on the first link.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A non-access point (AP) MLD comprises STAs, each comprising a transceiver that forms a link with a corresponding AP of an AP MLD, and a processor. A restricted TWT (R-TWT) schedule is established on a first link, and a first STA on that link is a member of an R-TWT service period (SP) on that link. A second STA on a second link is not a member of any R-TWT SP on that link that overlaps with the R-TWT SP on the first link. The processor transitions the non-AP MLD into EMLSR operation wherein the first and second links form an EMLSR link pair, determines that a transmission opportunity (TXOP) has begun on the second link, and coordinates between the STAs such that a frame exchange sequence with the AP MLD on the second link during the TXOP does not overlap with the R-TWT SP on the first link.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR OPERATING PROTOCOL LAYER OF TERMINAL IN INACTIVE MODE IN NEXT-GENERATION MOBILE COMMUNICATION SYSTEM ([[US Patent Application 18333089. METHOD AND APPARATUS FOR OPERATING PROTOCOL LAYER OF TERMINAL IN INACTIVE MODE IN NEXT-GENERATION MOBILE COMMUNICATION SYSTEM simplified abstract|18333089]])=== | | ===METHOD AND APPARATUS FOR OPERATING PROTOCOL LAYER OF TERMINAL IN INACTIVE MODE IN NEXT-GENERATION MOBILE COMMUNICATION SYSTEM ([[US Patent Application 18333089. METHOD AND APPARATUS FOR OPERATING PROTOCOL LAYER OF TERMINAL IN INACTIVE MODE IN NEXT-GENERATION MOBILE COMMUNICATION SYSTEM simplified abstract|18333089]])=== |
| Line 1,505: |
Line 881: |
| | Donggun KIM | | Donggun KIM |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a communication method and system that combines 5th-Generation (5G) technology with Internet of Things (IoT) technology. This allows for higher data rates than a 4th-Generation (4G) system and enables various intelligent services such as smart home, smart city, and connected car. The abstract also mentions improvements in the operation of a terminal in an RRC inactive mode.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A communication method and a system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of things (IoT) are provided. The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. The disclosure relates to schemes for improving an operation of a terminal in an RRC inactive mode.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR SUPPORTING POWER HEADROOM REPORT FOR PUSCH RETRANSMISSION USING MULTIPLE TRANSMISSION RECEPTION POINTS IN NEW GENERATION WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18305145. METHOD AND APPARATUS FOR SUPPORTING POWER HEADROOM REPORT FOR PUSCH RETRANSMISSION USING MULTIPLE TRANSMISSION RECEPTION POINTS IN NEW GENERATION WIRELESS COMMUNICATION SYSTEM simplified abstract|18305145]])=== | | ===METHOD AND APPARATUS FOR SUPPORTING POWER HEADROOM REPORT FOR PUSCH RETRANSMISSION USING MULTIPLE TRANSMISSION RECEPTION POINTS IN NEW GENERATION WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18305145. METHOD AND APPARATUS FOR SUPPORTING POWER HEADROOM REPORT FOR PUSCH RETRANSMISSION USING MULTIPLE TRANSMISSION RECEPTION POINTS IN NEW GENERATION WIRELESS COMMUNICATION SYSTEM simplified abstract|18305145]])=== |
| Line 1,519: |
Line 889: |
| | Seungri JIN | | Seungri JIN |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a communication system (5G or 6G) that supports a higher data transmission rate. In this system, a user equipment (UE) receives a message containing information to configure two cell groups. The UE then checks if a condition for triggering power headroom reporting (PHR) is met. It also checks if multiple transmission repetition procedures (TRPs) are configured for the serving cell and if the serving cell group allows PHR for multiple TRPs. The UE obtains two power headroom values related to the serving cell and sends them to the base station in a PHR MAC CE message.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. The method of UE comprises: receiving RRC message comprising cell group configuration information for configuring a first cell group and a second cell group; determining whether a PHR triggering condition is satisfied; determining whether multiple TRPs-based PUSCH repetition related to a serving cell is configured for an arbitrary activated serving cell included in the first cell group and the second cell group, and whether a serving cell group to which the activated serving cell belongs is configured to enable the PHR for the multiple TRPs; obtaining two pieces of power headroom related to the arbitrary activated serving cell; and transmitting a PHR MAC CE comprising the two pieces of power headroom related to the arbitrary activated serving cell to the base station.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING DATA IN HYBRID AUTOMATIC REPEAT REQUEST PROCESS ([[US Patent Application 18345503. METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING DATA IN HYBRID AUTOMATIC REPEAT REQUEST PROCESS simplified abstract|18345503]])=== | | ===METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING DATA IN HYBRID AUTOMATIC REPEAT REQUEST PROCESS ([[US Patent Application 18345503. METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING DATA IN HYBRID AUTOMATIC REPEAT REQUEST PROCESS simplified abstract|18345503]])=== |
| Line 1,533: |
Line 897: |
| | Sangkyu BAEK | | Sangkyu BAEK |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method used by a user equipment (UE) to transmit data to a base station. The UE receives configuration information from the base station regarding an uplink resource. Based on this information, the UE determines a Hybrid Automatic Repeat Request (HARQ) process. When the UE transmits uplink data corresponding to the HARQ process, it starts a configured grant timer (CGT) and a configured grant retransmission timer (CGRT). If the uplink data is retransmitted, the CGRT is restarted. The UE also receives downlink feedback information (DFI) from the base station. Based on the DFI indicating whether the base station received the uplink data, the CGT and CGRT are stopped.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method, performed by a user equipment (UE), of transmitting uplink data is provided. The method includes receiving, from a base station, configuration information for an uplink resource; determining a Hybrid Automatic Repeat Request (HARQ) process based on the configuration information; starting a configured grant timer (CGT) and a configured grant retransmission timer (CGRT) when uplink data corresponding to the HARQ process is transmitted; restarting the CGRT when the uplink data corresponding to the HARQ process is retransmitted; receiving, from the base station, downlink feedback information (DFI); and stopping the CGT and the CGRT based on the DFI indicating whether the base station received the uplink data.
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| | | | |
| | ===ELECTRONIC DEVICE INCLUDING ANTENNA MODULE IN COMMUNICATION SYSTEM, AND METHOD OF OPERATING SAME ([[US Patent Application 18344862. ELECTRONIC DEVICE INCLUDING ANTENNA MODULE IN COMMUNICATION SYSTEM, AND METHOD OF OPERATING SAME simplified abstract|18344862]])=== | | ===ELECTRONIC DEVICE INCLUDING ANTENNA MODULE IN COMMUNICATION SYSTEM, AND METHOD OF OPERATING SAME ([[US Patent Application 18344862. ELECTRONIC DEVICE INCLUDING ANTENNA MODULE IN COMMUNICATION SYSTEM, AND METHOD OF OPERATING SAME simplified abstract|18344862]])=== |
| Line 1,547: |
Line 905: |
| | Wooram KI | | Wooram KI |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an electronic device that includes a sensor module, an antenna module, and a processor. The processor is responsible for identifying a frequency band and measuring the distance between the antenna module and the user using the sensor module. Based on this information, the processor determines the appropriate power value for a transmission signal to be sent through the frequency band. The antenna module then uses this information to output the transmission signal.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An electronic device includes: a sensor module; an antenna module; and a processor electrically connected to the sensor module and the antenna module. The processor is configured to: identify a frequency band, identify a spaced distance from the antenna module to a user measured by the sensor module, and determine a power value of a transmission signal for being transmitted through the frequency band based on the frequency band and the spaced distance, and the antenna module is configured to output the transmission signal through the frequency band by using the antenna module.
| |
| | | | |
| | ===APPARATUS AND METHOD THEREOF IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18305114. APPARATUS AND METHOD THEREOF IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18305114]])=== | | ===APPARATUS AND METHOD THEREOF IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18305114. APPARATUS AND METHOD THEREOF IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18305114]])=== |
| Line 1,561: |
Line 913: |
| | Sa Zhang | | Sa Zhang |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes an apparatus and method used in a wireless communication system. The method involves determining when a certain bandwidth part is deactivated and another one is activated. It also involves deciding whether to process a specific type of scheduling configuration for transmitting data from the base station to the user device.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | An apparatus and a method performed by the same in a wireless communication system are provided. The method includes determining that a first bandwidth part (BWP) is deactivated and a second BWP is activated, and determining whether to process a semi-persistent scheduling (SPS) physical downlink shared channel (PDSCH) configuration activated before the first BWP is deactivated and the second BWP is activated.
| |
| | | | |
| | ===DCI FIELDS FOR MULTI-CELL SCHEDULING ([[US Patent Application 18297492. DCI FIELDS FOR MULTI-CELL SCHEDULING simplified abstract|18297492]])=== | | ===DCI FIELDS FOR MULTI-CELL SCHEDULING ([[US Patent Application 18297492. DCI FIELDS FOR MULTI-CELL SCHEDULING simplified abstract|18297492]])=== |
| Line 1,575: |
Line 921: |
| | Ebrahim MolavianJazi | | Ebrahim MolavianJazi |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes apparatuses and methods for scheduling multiple cells in a wireless communication system. The method involves receiving information about a set of cells and identifying time-domain resource allocation tables for each cell. It also involves receiving information about the allocation of physical downlink shared channels (PDSCHs) on the cells and a physical downlink control channel (PDCCH) that provides control information in a specific format. The method further includes determining the time resources for receiving the PDSCHs on the cells based on the entries in the time-domain resource allocation tables and receiving the PDSCHs on the cells accordingly.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | Apparatuses and methods for DCI fields for multi-cell scheduling. A method includes receiving first information for a set of cells and identifying first time-domain resource allocation (TDRA) tables having a one-to-one mapping with cells in the set of cells. The method further includes receiving second information for a second TDRA table for reception of physical downlink shared channels (PDSCHs) on cells in the set of cells and receiving a physical downlink control channel (PDCCH) that provides a downlink control information (DCI) format that includes a TDRA field that indicates a first row of the second TDRA table. The method further includes determining first time resources for the receptions of the first PDSCHs on the first cells based on first entries, respectively, of the first row of the second TDRA table and receiving the first PDSCHs on the first cells in the first time resources, respectively.
| |
| | | | |
| | ===METHOD AND DEVICE FOR TRANSMITTING AND RECEIVING HYBRID AUTOMATIC RETRANSMISSION REQUEST ACKNOWLEDGEMENT INFORMATION ([[US Patent Application 18304960. METHOD AND DEVICE FOR TRANSMITTING AND RECEIVING HYBRID AUTOMATIC RETRANSMISSION REQUEST ACKNOWLEDGEMENT INFORMATION simplified abstract|18304960]])=== | | ===METHOD AND DEVICE FOR TRANSMITTING AND RECEIVING HYBRID AUTOMATIC RETRANSMISSION REQUEST ACKNOWLEDGEMENT INFORMATION ([[US Patent Application 18304960. METHOD AND DEVICE FOR TRANSMITTING AND RECEIVING HYBRID AUTOMATIC RETRANSMISSION REQUEST ACKNOWLEDGEMENT INFORMATION simplified abstract|18304960]])=== |
| Line 1,589: |
Line 929: |
| | Jingxing FU | | Jingxing FU |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract discusses a method and device for transmitting information in a 5th or 6th generation communication system. Specifically, it focuses on transmitting hybrid automatic repeat request acknowledgement (HARQ-ACK) information. The method involves receiving downlink control information (DCI) from a base station, which schedules one or more multicast physical downlink shared channels (PDSCHs). The DCI includes a downlink assignment indication (DAI) associated with the multicast PDSCHs. The method also includes receiving the multicast PDSCHs based on the DCI. If the number of HARQ-ACK bits for the multicast PDSCHs is one, a first physical uplink control channel (PUCCH) resource with a negative acknowledgement (NACK) value is transmitted to the base station. If the number of HARQ-ACK bits is more than one, a second PUCCH resource is transmitted to the base station, selected from the configured PUCCH resources based on the number of HARQ-ACK bits.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The disclosure relates to a 5th generation (5G) or 6th generation (6G) communication system for supporting a higher data transmission rate. A method and device for transmitting hybrid automatic repeat request acknowledgement (HARQ-ACK) information are provided. The method includes receiving, from a base station (BS), downlink control information (DCI) scheduling one or more multicast physical downlink shared channels (PDSCHs), wherein the DCI includes a downlink assignment indication (DAI) associated with the one or more multicast PDSCHs, receiving, from the BS, the one or more multicast PDSCHs based on the DCI, in case that a number of hybrid automatic repeat request-acknowledgement (HARQ-ACK) bits for the one or more multicast PDSCHs is one, transmitting, to the BS, a first physical uplink control channel (PUCCH) resource including a NACK (negative acknowledgement) value, and in case that the number of HARQ-ACK bits for the one or more multicast PDSCHs is more than one, transmitting, to the BS, a second PUCCH resource among configured PUCCH resources according to the number of the HARQ-ACK bits.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR MULTI-CELL SCHEDULING AND HARQ-ACK TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18305767. METHOD AND APPARATUS FOR MULTI-CELL SCHEDULING AND HARQ-ACK TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18305767]])=== | | ===METHOD AND APPARATUS FOR MULTI-CELL SCHEDULING AND HARQ-ACK TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18305767. METHOD AND APPARATUS FOR MULTI-CELL SCHEDULING AND HARQ-ACK TRANSMISSION IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18305767]])=== |
| Line 1,603: |
Line 937: |
| | Kyungjun CHOI | | Kyungjun CHOI |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | This abstract describes a method used by a user equipment (UE) in a communication system, specifically in a 5th generation (5G) or 6th generation (6G) system, to support higher data transmission rates. The method involves the UE receiving downlink control information (DCI) from a base station, which schedules a set of physical downlink shared channels (PDSCHs) across multiple cells. The UE then identifies the timing value for hybrid automatic repeat request-acknowledgement (HARQ-ACK) feedback based on the DCI. It also identifies a reference uplink slot based on the PDSCH that ends last among the set of PDSCHs in multiple cells. Using the HARQ-ACK feedback timing value and the reference uplink slot, the UE identifies an uplink slot for transmitting the HARQ-ACK information of the set of PDSCHs in multiple cells. Finally, the UE transmits a physical uplink control channel (PUCCH) containing the HARQ-ACK information to the base station in the identified uplink slot.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The disclosure relates to a 5th generation (5G) or 6th generation (6G) communication system for supporting a higher data transmission rate. In accordance with an aspect of the disclosure, A method performed by a user equipment (UE) in a communication system is provided. The method includes receiving, from a base station, downlink control information (DCI) scheduling a set of physical downlink shared channels (PDSCHs) in multiple cells, identifying a hybrid automatic repeat request-acknowledgement (HARQ-ACK) feedback timing value based on the DCI, identifying a reference uplink slot based on a PDSCH ending last among the set of PDSCHs in multiple cells, identifying an uplink slot for HARQ-ACK information of the set of PDSCHs in multiple cells based on the HARQ-ACK feedback timing value and the reference uplink slot, and transmitting, to the base station, a physical uplink control channel (PUCCH) including the HARQ-ACK information in the uplink slot.
| |
| | | | |
| | ===METHOD AND APPARATUS FOR TRANSMISSION AND RECEPTION OF CONTROL INFORMATION IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18304140. METHOD AND APPARATUS FOR TRANSMISSION AND RECEPTION OF CONTROL INFORMATION IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18304140]])=== | | ===METHOD AND APPARATUS FOR TRANSMISSION AND RECEPTION OF CONTROL INFORMATION IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18304140. METHOD AND APPARATUS FOR TRANSMISSION AND RECEPTION OF CONTROL INFORMATION IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18304140]])=== |
| Line 1,617: |
Line 945: |
| | Youngrok JANG | | Youngrok JANG |
| | | | |
| − |
| |
| − | '''Brief explanation'''
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| − | This abstract describes a communication system, specifically for 5G or 6G networks, that can support faster data transmission rates. The system involves receiving configuration information from a base station regarding a control channel. This configuration information includes details about the control channel such as control resource sets and search space information. The system also involves receiving a signal of a physical downlink control channel (PDCCH) repetition transmission from the base station, based on the provided configuration information. The search space information includes bitmaps related to frequency locations, with the first search space having a first bitmap and the second search space having a second bitmap.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The disclosure relates to a 5G or 6G communication system for supporting a higher data transmission rate. The disclosure may include receiving, from a base station, configuration information related to a control channel, the configuration information related to the control channel including first control resource set information and first search space information, and second control resource set information and second search space information, and receiving, from the base station, a signal of physical downlink control channel (PDCCH) repetition transmission, based on the configuration information related to the control channel, the first search space information may include a first bitmap related to a frequency location, and the second search space information may include a second bitmap related to a frequency location.
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| | | | |
| | ===METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING SIGNAL BY USING MULTIPLE BEAMS IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18347392. METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING SIGNAL BY USING MULTIPLE BEAMS IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18347392]])=== | | ===METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING SIGNAL BY USING MULTIPLE BEAMS IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18347392. METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING SIGNAL BY USING MULTIPLE BEAMS IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18347392]])=== |
| Line 1,631: |
Line 953: |
| | Seungri JIN | | Seungri JIN |
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| − |
| |
| − | '''Brief explanation'''
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| − | This abstract describes a method performed by a user equipment (UE) in a wireless communication system. The UE receives configuration information from a base station (BS) regarding a physical downlink shared channel (PDSCH), which includes a list of transmission configuration indicator (TCI) states. The UE also receives a PDSCH media access control element (MAC CE) from the BS, which indicates the activation of at least one TCI state from the list. The UE then identifies whether the PDSCH MAC CE is capable of indicating two or more TCI states for one TCI codepoint. Additionally, the UE receives downlink control information (DCI) from the BS, which includes information indicating a TCI codepoint. Finally, the UE receives data via the PDSCH based on the activation of the at least one TCI state, the result of the identification, and the information indicating the TCI codepoint.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A method performed by a user equipment (UE) in a wireless communication system includes receiving, from a base station (BS), physical downlink shared channel (PDSCH) configuration information including a list of transmission configuration indicator (TCI) states, receiving, from the BS, a PDSCH media access control element (MAC CE) including information indicating activation of at least one TCI state in the list, identifying whether the PDSCH MAC CE is a MAC CE capable of indicating two or more TCI states for one TCI codepoint, receiving, from the BS, downlink control information (DCI) including information indicating a TCI codepoint, and receiving, from the BS, data via a PDSCH based on the information indicating activation of the at least one TCI state, a result of the identifying, and the information indicating the TCI codepoint.
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| | | | |
| | ===PRACH FOR COVERAGE ENHANCEMENTS ([[US Patent Application 18168540. PRACH FOR COVERAGE ENHANCEMENTS simplified abstract|18168540]])=== | | ===PRACH FOR COVERAGE ENHANCEMENTS ([[US Patent Application 18168540. PRACH FOR COVERAGE ENHANCEMENTS simplified abstract|18168540]])=== |
| Line 1,645: |
Line 961: |
| | Jung Hyun BAE | | Jung Hyun BAE |
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| − |
| |
| − | '''Brief explanation'''
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| − | The abstract describes a system and method for improving coverage in wireless communication networks. It involves a User Equipment (UE) transmitting a signal called the Physical Random Access Channel (PRACH) in two different time slots called Random Access Channel Occasions (ROs). The second PRACH transmission is a repetition of the first one, but it is sent in a different RO with a slightly different index. This technique helps enhance the coverage and reliability of the wireless network.
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| − |
| |
| − | '''Abstract'''
| |
| − | A system and a method are disclosed for PRACH for coverage enhancements. In some embodiments, the method includes: transmitting, by a User Equipment (UE), a first Physical Random Access Channel (PRACH) transmission in a first Random Access Channel Occasion (RO); and transmitting, by the UE, a second PRACH transmission in a second RO, the second PRACH transmission being a repetition of the first PRACH transmission, the second RO having an index differing from an index of the first RO by a set integer.
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| | | | |
| | ===METHOD AND APPARATUS FOR ENHANCING DRX CONFIGURATION IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18303984. METHOD AND APPARATUS FOR ENHANCING DRX CONFIGURATION IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18303984]])=== | | ===METHOD AND APPARATUS FOR ENHANCING DRX CONFIGURATION IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18303984. METHOD AND APPARATUS FOR ENHANCING DRX CONFIGURATION IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18303984]])=== |
| Line 1,659: |
Line 969: |
| | Taeseop LEE | | Taeseop LEE |
| | | | |
| − |
| |
| − | '''Brief explanation'''
| |
| − | The abstract describes a method used by a user equipment (UE) in a wireless communication system, specifically in a 5th or 6th generation system, to support faster data transmission. The method involves the UE receiving configuration information from a base station regarding a discontinuous reception (DRX) feature. The UE then starts a timer based on this configuration information and monitors a specific channel called the physical downlink control channel (PDCCH) based on the timer. The configuration information includes timer values for different subcarrier spacing (SCS) groups.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The disclosure relates to a 5th generation (5G) or 6th generation (6G) communication system for supporting a higher data transmission rate. A method performed by a user equipment (UE) in a wireless communication system is provided. The method includes receiving configuration information regarding a discontinuous reception (DRX) from a base station, starting a first timer based on the configuration information, and monitoring a physical downlink control channel (PDCCH) based on the first timer, wherein the configuration information includes a first timer value for a first subcarrier spacing (SCS) group and a first timer value for a second SCS group.
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| | | | |
| | ===METHOD AND USER EQUIPMENT FOR HANDLING USER PLANE IN DUAL CONNECTIVITY IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18346040. METHOD AND USER EQUIPMENT FOR HANDLING USER PLANE IN DUAL CONNECTIVITY IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18346040]])=== | | ===METHOD AND USER EQUIPMENT FOR HANDLING USER PLANE IN DUAL CONNECTIVITY IN WIRELESS COMMUNICATION SYSTEM ([[US Patent Application 18346040. METHOD AND USER EQUIPMENT FOR HANDLING USER PLANE IN DUAL CONNECTIVITY IN WIRELESS COMMUNICATION SYSTEM simplified abstract|18346040]])=== |
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Line 977: |
| | Neha SHARMA | | Neha SHARMA |
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| − |
| |
| − | '''Brief explanation'''
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| − | This abstract describes a method for managing the user plane in a user equipment (UE) that is configured for dual connectivity operation. The method involves receiving a message from either a main network (MN) or a secondary network (SN) that includes information about the layers and configurations of radio bearers. Based on this information, the UE performs certain actions such as reestablishing a Radio Link Control (RLC) entity and a Packet Data Convergence Protocol (PDCP) entity, or performing a data recovery procedure for the PDCP entity. The specific actions taken depend on the indications and configurations provided in the message.
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| − |
| |
| − | '''Abstract'''
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| − | Embodiments herein provide a method for handling a user plane by a UE configured for dual connectivity operation. The method includes receiving a RRC reconfiguration message including one or more Layer indications and a Layer configuration corresponding to one or more radio bearers from one of a MN and a SN involved in a dual connectivity operation of the UE. Further, the method includes performing, by the UE, one of: reestablishing of a RLC entity and a data recovery procedure for a PDCP entity corresponding to the radio bearer based on the one or more Layer indications and the Layer configuration received in the RRC reconfiguration message, and reestablishing of a RLC entity and reestablishing of a PDCP entity corresponding to the radio bearer based on the one or more Layer indications and the Layer configuration received in the RRC reconfiguration message.
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| | | | |
| | ===HEATING COOKING APPARATUS AND METHOD FOR CONTROLLING THE SAME ([[US Patent Application 18217184. HEATING COOKING APPARATUS AND METHOD FOR CONTROLLING THE SAME simplified abstract|18217184]])=== | | ===HEATING COOKING APPARATUS AND METHOD FOR CONTROLLING THE SAME ([[US Patent Application 18217184. HEATING COOKING APPARATUS AND METHOD FOR CONTROLLING THE SAME simplified abstract|18217184]])=== |
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Line 985: |
| | Yunkyeong LEE | | Yunkyeong LEE |
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| − |
| |
| − | '''Brief explanation'''
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| − | This abstract describes a cooking apparatus that includes a plate and a heater. The heater is used to heat a cooking container placed on the plate. The apparatus also includes a controller that creates a recipe with multiple stages based on the operation information of the heater. When there is a change in the operation state of the heater, the controller creates a first stage based on the operation information before the change and a second stage based on the operation information after the change. The recipe includes both the first and second stages.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | A heating cooking apparatus includes: a plate; a heater configured to heat a cooking container placed in a cooking area of the plate; and a controller configured to create a recipe including a plurality of stages based on operation information of the heater, wherein the controller is configured to, based on a change in operation state of the heater, create a first stage based on first operation information, among the operation information of the heater, which corresponds to the operation state of the heater before the change of the operation state of the heater, and create a second stage based on second operation information, among the operation information of the heater, which corresponds to the operation state of the heater after the change of the operation state of the heater, and the recipe includes the first stage and the second stage.
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| | | | |
| | ===COOKING APPARATUS ([[US Patent Application 18177627. COOKING APPARATUS simplified abstract|18177627]])=== | | ===COOKING APPARATUS ([[US Patent Application 18177627. COOKING APPARATUS simplified abstract|18177627]])=== |
| Line 1,701: |
Line 993: |
| | Sangjin JEONG | | Sangjin JEONG |
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| − |
| |
| − | '''Brief explanation'''
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| − | The cooking apparatus described in the abstract consists of a main body with a cooking chamber, a door that can be opened and closed, and a door lock. The door lock includes a part called the interference member, which is designed to prevent the door from being opened. There is also a lock case that can hold the interference member and allow it to move. The interference member can be in three positions: an interference position where it blocks the door from opening, an interference release position where it allows the door to open, and a function release position where it restricts the interference but still allows the door to open partially. In the function release position, the interference member is supported by the lock case and can only move between the interference release and interference positions.
| |
| − |
| |
| − | '''Abstract'''
| |
| − | The cooking apparatus includes a main body forming a cooking chamber, a door configured to open and close the cooking chamber, and a door lock including an interference member configured to interfere with a movement of the door while opening the cooking chamber, and a lock case configured to accommodate the interference member so as to be movable therein. The interference member is configured to move to an interference position for applying an interference with opening the door, an interference release position for releasing the interference of opening the door, and a function release position for restricting the interference of opening the door, the function release position is a position in which the interference member is supported by the lock case and in which movement of the interference member is restricted to the interference release position and the interference position.
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| | | | |
| | ===DISPLAY APPARATUS ([[US Patent Application 18216053. DISPLAY APPARATUS simplified abstract|18216053]])=== | | ===DISPLAY APPARATUS ([[US Patent Application 18216053. DISPLAY APPARATUS simplified abstract|18216053]])=== |
| Line 1,715: |
Line 1,001: |
| | Hyeonyeon PARK | | Hyeonyeon PARK |
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| − |
| |
| − | '''Brief explanation'''
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| − | The abstract describes a display apparatus that includes a display panel, a light source module, a rear chassis, and a heat dissipation member. The display panel is used to display a screen in a certain direction. The light source module consists of multiple light sources that are spaced apart from each other in a direction perpendicular to the display panel. The rear chassis has several coupling protrusions that are also spaced apart from each other in the same direction as the light sources. The heat dissipation member has insertion holes where the coupling protrusions of the rear chassis can be inserted. The insertion holes are spaced apart from each other along the length of the heat dissipation member, which extends in the same direction as the light sources. The heat dissipation member has a central insertion hole and an elongated insertion hole at one end.
| |
| − |
| |
| − | '''Abstract'''
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| − | A display apparatus comprises: a display panel on which a screen is displayable along a first direction; a light source module including a plurality of light sources, spaced apart from each other along a second direction perpendicular to the first direction 1; a rear chassis including a plurality of coupling protrusions spaced apart from each other along the second direction; and a heat dissipation member includes a plurality of insertion holes, into which the plurality of coupling protrusions of the rear chassis are insertable, spaced apart from each other along a long axis of the heat dissipation member which extends along the second direction, and among the plurality of insertion holes, a first insertion hole at a center along the long axis and a second insertion hole adjacent to a side end of the heat dissipation member along the long axis in a shape elongated along the long axis.
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| | | | |
| | ===METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE ([[US Patent Application 18132198. METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE simplified abstract|18132198]])=== | | ===METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE ([[US Patent Application 18132198. METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE simplified abstract|18132198]])=== |
| Line 1,729: |
Line 1,009: |
| | Seokhan Park | | Seokhan Park |
| | | | |
| − |
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| − | '''Brief explanation'''
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| − | The abstract describes a method of manufacturing a semiconductor device. It involves creating trenches in a substrate and filling them with layers that protrude from the substrate. Spacers are then formed on the sidewalls of these protrusions, exposing portions of the substrate. Additional trenches are created around the first ones by etching the exposed substrate. These second trenches are filled with more layers. The first filling layers and spacers are then removed. Finally, a gate material layer is applied to the inner walls of the first trenches, and gate structures are formed by separating this layer.
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| − |
| |
| − | '''Abstract'''
| |
| − | A method of manufacturing a semiconductor device includes forming a plurality of first trenches in a substrate. A plurality of first filling layers is formed that fills the first trenches and have protrusions extending to protrude from the substrate. Spacers are formed on sidewalls of the protrusions of the first filling layers. The spacers expose portions of the substrate between adjacent first filling layers. A plurality of second trenches is formed around the first trenches by etching the portions of the substrate exposed by the spacers. A plurality of second filling layers is formed that fills the second trenches. All of the first filling layers and the spacers are removed. A gate material layer is formed that conformally covers inner walls of the first trenches. A pair of gate structures is formed in each of the first trenches by separating the gate material layer.
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| | | | |
| | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18215301. SEMICONDUCTOR DEVICE simplified abstract|18215301]])=== | | ===SEMICONDUCTOR DEVICE ([[US Patent Application 18215301. SEMICONDUCTOR DEVICE simplified abstract|18215301]])=== |
| Line 1,743: |
Line 1,017: |
| | Kyooho JUNG | | Kyooho JUNG |
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| − |
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| − | '''Brief explanation'''
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| − | This abstract describes a semiconductor device that includes a substrate and bottom electrodes. The bottom electrodes have two regions, with the second region containing an additional element compared to the first region. There is a first supporting pattern on the substrate that is in contact with a portion of the side surface of each bottom electrode. A top electrode is placed on the bottom electrodes, with a dielectric layer in between. A capping layer is also present between the bottom electrodes and the dielectric layer, covering the top and bottom surfaces of the first supporting pattern. The second region of the bottom electrodes is in contact with the capping layer, and the capping layer and the dielectric layer are made of different materials.
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| − |
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| − | '''Abstract'''
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| − | A semiconductor device including a substrate; bottom electrodes on the substrate, each bottom electrode including a first region and a second region, the second region containing an additional element relative to the first region; a first supporting pattern on the substrate and in contact with a portion of a side surface of each bottom electrode; a top electrode on the bottom electrodes; a dielectric layer between the bottom electrodes and the top electrode; and a capping layer between the bottom electrodes and the dielectric layer, the capping layer covering a top surface and a bottom surface of the first supporting pattern, wherein the second region is in contact with the capping layer, and the capping layer and the dielectric layer include different materials from each other.
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| | ===ELECTROLUMINESCENT DEVICE, PRODUCTION METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE SAME ([[US Patent Application 18304714. ELECTROLUMINESCENT DEVICE, PRODUCTION METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE SAME simplified abstract|18304714]])=== | | ===ELECTROLUMINESCENT DEVICE, PRODUCTION METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE SAME ([[US Patent Application 18304714. ELECTROLUMINESCENT DEVICE, PRODUCTION METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE SAME simplified abstract|18304714]])=== |
| Line 1,757: |
Line 1,025: |
| | Moon Gyu HAN | | Moon Gyu HAN |
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| − |
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| − | '''Brief explanation'''
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| − | The abstract describes an electroluminescent device that consists of several layers. It includes a light emitting layer positioned between two electrodes, and an electron transport layer placed between the light emitting layer and the second electrode. The light emitting layer is composed of two layers: the first layer contains multiple semiconductor nanoparticles surrounded by a p-type organic semiconductor polymer, and the second layer contains additional semiconductor nanoparticles.
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| − |
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| − | '''Abstract'''
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| − | An electroluminescent device including a light emitting layer disposed between a first electrode and a second electrode, and an electron transport layer disposed between the multi-layered light emitting film and the second electrode, where the multi-layered light emitting film includes a first layer and a second layer disposed on the first layer, the first layer including a plurality of first semiconductor nanoparticles surrounded by a p-type organic semiconductor polymer, and the second layer including a plurality of second semiconductor nanoparticles
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| | | | |
| | ===ELECTRONIC DEVICE INCLUDING UNDER DISPLAY CAMERA ([[US Patent Application 18298599. ELECTRONIC DEVICE INCLUDING UNDER DISPLAY CAMERA simplified abstract|18298599]])=== | | ===ELECTRONIC DEVICE INCLUDING UNDER DISPLAY CAMERA ([[US Patent Application 18298599. ELECTRONIC DEVICE INCLUDING UNDER DISPLAY CAMERA simplified abstract|18298599]])=== |
| Line 1,771: |
Line 1,033: |
| | Sungyoung SHIN | | Sungyoung SHIN |
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| − |
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| − | '''Brief explanation'''
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| − | This abstract describes an electronic device that includes a camera located underneath the display. The device has a housing, a display, and a camera inside the housing that captures light passing through the display from the outside. The display is divided into two areas: one area where the camera is located, and another area where a different pixel and its driving circuit are located. The driving circuit for the camera pixel has a straight shape, while the driving circuit for the other pixel has a curved shape. The camera pixel's driving circuit has a wider channel width but a shorter channel length compared to the other pixel's driving circuit.
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| − |
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| − | '''Abstract'''
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| − | Various embodiments of the disclosure relate to an electronic device including an under display camera (UDC). The electronic device includes: a housing, a display, and a camera disposed inside the housing overlapping a portion of the display and acquiring light passing through the display from outside. The display includes a first area in which a first pixel overlapping with at least a portion of the camera and a first pixel driving circuit for driving the first pixel are disposed, and a second area, other than the first area, in which a second pixel and a second pixel driving circuit for driving the second pixel are disposed. The first pixel driving circuit includes a first driving thin film transistor (TFT) having a first channel region having a straight shape does not include a curved shape, and the second pixel driving circuit includes a second driving TFT having a second channel region of a curved shape. A first channel width of the first driving TFT is greater than a second channel width of the second driving TFT, and a first channel length of the first driving TFT is less than a second channel length of the second driving TFT.
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| | ===ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING THE ORGANOMETALLIC COMPOUND, AND DIAGNOSIS COMPOSITION INCLUDING THE ORGANOMETALLIC COMPOUND ([[US Patent Application 18345302. ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING THE ORGANOMETALLIC COMPOUND, AND DIAGNOSIS COMPOSITION INCLUDING THE ORGANOMETALLIC COMPOUND simplified abstract|18345302]])=== | | ===ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING THE ORGANOMETALLIC COMPOUND, AND DIAGNOSIS COMPOSITION INCLUDING THE ORGANOMETALLIC COMPOUND ([[US Patent Application 18345302. ORGANOMETALLIC COMPOUND, ORGANIC LIGHT-EMITTING DEVICE INCLUDING THE ORGANOMETALLIC COMPOUND, AND DIAGNOSIS COMPOSITION INCLUDING THE ORGANOMETALLIC COMPOUND simplified abstract|18345302]])=== |
| Line 1,785: |
Line 1,041: |
| | Yongsuk CHO | | Yongsuk CHO |
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| − |
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| − | '''Brief explanation'''
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| − | The abstract describes an organometallic compound represented by Formula 1. It is a concise summary of the compound without any exaggerated claims or a specific title.
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| − |
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| − | '''Abstract'''
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| − | An organometallic compound represented by Formula 1:
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| | | | |
| | ===N-TYPE SEMICONDUCTOR, AND ORGANIC PHOTOELECTRIC DEVICE, IMAGE SENSOR, AND ELECTRONIC DEVICE INCLUDING THE SAME ([[US Patent Application 18344265. N-TYPE SEMICONDUCTOR, AND ORGANIC PHOTOELECTRIC DEVICE, IMAGE SENSOR, AND ELECTRONIC DEVICE INCLUDING THE SAME simplified abstract|18344265]])=== | | ===N-TYPE SEMICONDUCTOR, AND ORGANIC PHOTOELECTRIC DEVICE, IMAGE SENSOR, AND ELECTRONIC DEVICE INCLUDING THE SAME ([[US Patent Application 18344265. N-TYPE SEMICONDUCTOR, AND ORGANIC PHOTOELECTRIC DEVICE, IMAGE SENSOR, AND ELECTRONIC DEVICE INCLUDING THE SAME simplified abstract|18344265]])=== |
| Line 1,799: |
Line 1,049: |
| | Yeong Suk CHOI | | Yeong Suk CHOI |
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| − |
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| − | '''Brief explanation'''
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| − | The abstract describes the disclosure of an n-type semiconductor compound, represented by Chemical Formula 1 or Chemical Formula 2. It also mentions the use of this compound in an image sensor and an electronic device. The abstract does not provide any further details or claims about the potential benefits or advantages of the disclosed semiconductor.
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| − |
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| − | '''Abstract'''
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| − | Disclosed are an n-type semiconductor including compound represented by Chemical Formula 1 or Chemical Formula 2, an image sensor, and an electronic device.
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| | | | |
| | ===COMPOUND, COMPOSITION AND ORGANIC OPTOELECTRONIC DEVICE AND DISPLAY DEVICE ([[US Patent Application 18123444. COMPOUND, COMPOSITION AND ORGANIC OPTOELECTRONIC DEVICE AND DISPLAY DEVICE simplified abstract|18123444]])=== | | ===COMPOUND, COMPOSITION AND ORGANIC OPTOELECTRONIC DEVICE AND DISPLAY DEVICE ([[US Patent Application 18123444. COMPOUND, COMPOSITION AND ORGANIC OPTOELECTRONIC DEVICE AND DISPLAY DEVICE simplified abstract|18123444]])=== |
| Line 1,812: |
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| | | | |
| | Seungjae LEE | | Seungjae LEE |
| − |
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| − |
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| − | '''Brief explanation'''
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| − | The abstract describes the disclosure of a compound formed by combining Chemical Formula 1 and Chemical Formula 2. It also mentions the composition that includes this compound, an organic optoelectronic device, and a display device. The abstract does not provide any additional details or oversell any claims.
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| − |
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| − | '''Abstract'''
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| − | A compound represented by a combination of Chemical Formula 1 and Chemical Formula 2 bonded together, a composition including the compound, an organic optoelectronic device, and a display device are disclosed.
| |
