Category:Nitin A. Deshpande of Chandler AZ (US)
Nitin A. Deshpande of Chandler AZ (US)
Executive Summary
Nitin A. Deshpande of Chandler AZ (US) is an inventor who has filed 10 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (7 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (6 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (5 patents), and they have worked with companies such as Intel Corporation (10 patents). Their most frequent collaborators include (6 collaborations), (5 collaborations), (5 collaborations).
Patent Filing Activity
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Technology Areas
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List of Technology Areas
- H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 7 patents
- H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
- H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
- H01L23/544 (Marks applied to semiconductor devices {or parts}, e.g. registration marks, {alignment structures, wafer maps (test patterns for characterising or monitoring manufacturing processes): 3 patents
- H01L2223/54426 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H01L24/33 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/3313 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 2 patents
- H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/08137 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/33055 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/3314 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2225/06562 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/14 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2225/06593 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/2026 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/3157 ({Partial encapsulation or coating (mask layer used as insulation layer): 1 patents
- H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 1 patents
- H01L23/473 (by flowing liquids {(): 1 patents
- H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
- H01L24/24 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/08165 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/24051 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/24137 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/01029 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/1435 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 1 patents
- H01L23/564 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L24/05 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05541 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/05647 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/16225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/80357 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/80379 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/04642 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/0504 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/059 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents
- H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 1 patents
- H01L2224/08121 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/16238 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/1205 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- G02B6/1225 (of the integrated circuit kind (electric integrated circuits): 1 patents
- G02B6/12002 (of the integrated circuit kind (electric integrated circuits): 1 patents
- G02B2006/1213 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 1 patents
- G02B2006/12176 (OPTICAL ELEMENTS, SYSTEMS OR APPARATUS): 1 patents
- H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/16145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
Companies
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List of Companies
- Intel Corporation: 10 patents
Collaborators
- Omkar G. Karhade of Chandler AZ (US) (6 collaborations)
- Debendra Mallik of Chandler AZ (US) (5 collaborations)
- Ravindranath Vithal Mahajan of Chandler AZ (US) (5 collaborations)
- Bhaskar Jyoti Krishnatreya of Hillsboro OR (US) (4 collaborations)
- Sagar Suthram of Portland OR (US) (4 collaborations)
- Wilfred Gomes of Portland OR (US) (4 collaborations)
- Pushkar Sharad Ranade of San Jose CA (US) (4 collaborations)
- Abhishek A. Sharma of Portland OR (US) (4 collaborations)
- Francisco Maya of Portland OR (US) (3 collaborations)
- Siyan Dong of Chandler AZ (US) (3 collaborations)
- Mohit Bhatia of Chandler AZ (US) (2 collaborations)
- Tan Nguyen of Hillsboro OR (US) (2 collaborations)
- Alveera Gill of Hillsboro OR (US) (2 collaborations)
- Keith E. Zawadzki of Portland OR (US) (2 collaborations)
- Khant Minn of Chandler AZ (US) (1 collaborations)
- Suresh V. Pothukuchi of Chandler AZ (US) (1 collaborations)
- Arnab Sarkar of Chandler AZ (US) (1 collaborations)
- Adel A. Elsherbini of Chandler AZ (US) (1 collaborations)
- Brandon M. Rawlings of Chandler AZ (US) (1 collaborations)
- Kimin Jun of Portland OR (US) (1 collaborations)
- Prashant Majhi of San Jose CA (US) (1 collaborations)
- Johanna M. Swan of Scottsdale AZ (US) (1 collaborations)
- Mohammad Enamul Kabir of Portland OR (US) (1 collaborations)
- Xiaoqian Li of Chandler AZ (US) (1 collaborations)
- Tarek A. Ibrahim of Mesa AZ (US) (1 collaborations)
- Joshua Fryman of Corvallis OR (US) (1 collaborations)
- Stephen Morein of San Jose CA (US) (1 collaborations)
- Matthew Adiletta of Bolton MA (US) (1 collaborations)
- Michael Crocker of Portland OR (US) (1 collaborations)
- Aaron Gorius of Upton MA (US) (1 collaborations)
Subcategories
This category has the following 6 subcategories, out of 6 total.
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D
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Pages in category "Nitin A. Deshpande of Chandler AZ (US)"
The following 21 pages are in this category, out of 21 total.
1
- 17846086. PACKAGE ARCHITECTURE WITH VERTICAL STACKING OF INTEGRATED CIRCUIT DIES HAVING PLANARIZED EDGES simplified abstract (Intel Corporation)
- 17846109. PACKAGE ARCHITECTURE WITH VERTICAL STACKING OF INTEGRATED CIRCUIT DIES HAVING PLANARIZED EDGES AND MULTI-SIDE ROUTING simplified abstract (Intel Corporation)
- 17846129. PACKAGE ARCHITECTURE WITH VERTICALLY STACKED BRIDGE DIES HAVING PLANARIZED EDGES simplified abstract (Intel Corporation)
- 17846153. PACKAGE ARCHITECTURE OF THREE-DIMENSIONAL INTERCONNECT CUBE WITH INTEGRATED CIRCUIT DIES HAVING PLANARIZED EDGES simplified abstract (Intel Corporation)
- 17846173. PACKAGE ARCHITECTURE OF PHOTONIC SYSTEM WITH VERTICALLY STACKED DIES HAVING PLANARIZED EDGES simplified abstract (Intel Corporation)
- 18189844. PHOTONIC INTEGRATED CIRCUIT DEFINING TRENCHES THEREIN simplified abstract (Intel Corporation)
- 18344260. PACKAGING ARCHITECTURE INCLUDING COMPENSATION LAYERS FOR WAFER-SCALE KNOWN-GOOD-DIE TO KNOWN-GOOD-DIE HYBRID BONDING (Intel Corporation)
- 18345820. SLIT FIDUCIALS FOR INTEGRATED CIRCUIT DEVICE ALIGNMENT (Intel Corporation)
- 18346098. FIDUCIALS WITH UNDERLYING DUMMY METALLIZATION FOR INTEGRATED CIRCUIT DEVICE ALIGNMENT (Intel Corporation)
- 18346108. FIDUCIALS WITH ASSOCIATED LOW-DENSITY METAL ZONES (Intel Corporation)
- 18400761. MICROELECTRONIC STRUCTURES INCLUDING BRIDGES simplified abstract (Intel Corporation)
- 18462600. MICROELECTRONIC STRUCTURES INCLUDING BRIDGES simplified abstract (Intel Corporation)
I
- Intel corporation (20240136292). MICROELECTRONIC STRUCTURES INCLUDING BRIDGES simplified abstract
- Intel corporation (20240272388). ARCHITECTURE AND METHOD FOR V GROOVE FIBER ATTACH FOR A PHOTONIC INTEGRATED CIRCUIT (PIC) simplified abstract
- Intel corporation (20240319437). PHOTONIC INTEGRATED CIRCUIT DEFINING TRENCHES THEREIN simplified abstract
- Intel corporation (20250060531). PHOTONIC INTEGRATED CIRCUIT PACKAGING ARCHITECTURE
- Intel corporation (20250062278). PACKAGE ARCHITECTURES HAVING VERTICALLY STACKED DIES WITH SOLDER INTERCONNECTS
- Intel corporation (20250079263). PACKAGE ARCHITECTURES HAVING VERTICALLY STACKED DIES WITH A COOLING MICROCHANNEL
- Intel corporation (20250079392). HYBRID BONDING INTERCONNECT (HBI) ARCHITECTURES AND METHODS FOR SCALABILITY
- Intel corporation (20250079398). PACKAGE ARCHITECTURES HAVING VERTICALLY STACKED DIES AND VOLTAGE REGULATORS
- Intel corporation (20250079399). PACKAGE ARCHITECTURES HAVING VERTICALLY STACKED DIES AS A SOLID STATE BATTERY
Categories:
- Omkar G. Karhade of Chandler AZ (US)
- Debendra Mallik of Chandler AZ (US)
- Ravindranath Vithal Mahajan of Chandler AZ (US)
- Bhaskar Jyoti Krishnatreya of Hillsboro OR (US)
- Sagar Suthram of Portland OR (US)
- Wilfred Gomes of Portland OR (US)
- Pushkar Sharad Ranade of San Jose CA (US)
- Abhishek A. Sharma of Portland OR (US)
- Francisco Maya of Portland OR (US)
- Siyan Dong of Chandler AZ (US)
- Mohit Bhatia of Chandler AZ (US)
- Tan Nguyen of Hillsboro OR (US)
- Alveera Gill of Hillsboro OR (US)
- Keith E. Zawadzki of Portland OR (US)
- Khant Minn of Chandler AZ (US)
- Suresh V. Pothukuchi of Chandler AZ (US)
- Arnab Sarkar of Chandler AZ (US)
- Adel A. Elsherbini of Chandler AZ (US)
- Brandon M. Rawlings of Chandler AZ (US)
- Kimin Jun of Portland OR (US)
- Prashant Majhi of San Jose CA (US)
- Johanna M. Swan of Scottsdale AZ (US)
- Mohammad Enamul Kabir of Portland OR (US)
- Xiaoqian Li of Chandler AZ (US)
- Tarek A. Ibrahim of Mesa AZ (US)
- Joshua Fryman of Corvallis OR (US)
- Stephen Morein of San Jose CA (US)
- Matthew Adiletta of Bolton MA (US)
- Michael Crocker of Portland OR (US)
- Aaron Gorius of Upton MA (US)
- Nitin A. Deshpande of Chandler AZ (US)
- Inventors
- Inventors filing patents with Intel Corporation