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Category:Mauro J. Kobrinsky of Portland OR (US)
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Pages in category "Mauro J. Kobrinsky of Portland OR (US)"
The following 10 pages are in this category, out of 10 total.
1
- 17838637. DUAL METAL SILICIDE FOR STACKED TRANSISTOR DEVICES simplified abstract (Intel Corporation)
- 17838646. SOURCE AND DRAIN CONTACTS FORMED USING SACRIFICIAL REGIONS OF SOURCE AND DRAIN simplified abstract (Intel Corporation)
- 17847628. LOWER DEVICE ACCESS IN STACKED TRANSISTOR DEVICES simplified abstract (Intel Corporation)
- 17848660. VARACTOR DEVICE WITH BACKSIDE ELECTRICAL CONTACT simplified abstract (Intel Corporation)
- 17850778. INTEGRATED CIRCUIT STRUCTURE WITH BACKSIDE POWER STAPLE simplified abstract (Intel Corporation)
- 17850782. SIGE:GAB SOURCE OR DRAIN STRUCTURES WITH LOW RESISTIVITY simplified abstract (Intel Corporation)
- 17851658. SELF-ALIGNED EMBEDDED SOURCE AND DRAIN CONTACTS simplified abstract (Intel Corporation)
- 17943812. DIODES WITH BACKSIDE CONTACT simplified abstract (Intel Corporation)
- 17943815. TARGETED SUB-FIN ETCH DEPTH simplified abstract (Intel Corporation)
- 18520872. DEVICE LAYER INTERCONNECTS simplified abstract (Intel Corporation)
