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Category:Kishore Kumar Muchherla of Fremont CA (US)
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Pages in category "Kishore Kumar Muchherla of Fremont CA (US)"
The following 14 pages are in this category, out of 14 total.
1
- 17830166. MANAGING QUAD-LEVEL CELL COMPACTION STRATEGY OF A MEMORY DEVICE simplified abstract (Micron Technology, Inc.)
- 17859468. MEMORY COMPACTION MANAGEMENT IN MEMORY DEVICES simplified abstract (Micron Technology, Inc.)
- 17863000. MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM simplified abstract (Micron Technology, Inc.)
- 17884432. MULTI-LAYER CODE RATE ARCHITECTURE FOR SPECIAL EVENT PROTECTION WITH REDUCED PERFORMANCE PENALTY simplified abstract (Micron Technology, Inc.)
- 17894794. TWO-TIER DEFECT SCAN MANAGEMENT simplified abstract (Micron Technology, Inc.)
- 17895886. READ COUNTER ADJUSTMENT FOR DELAYING READ DISTURB SCANS simplified abstract (Micron Technology, Inc.)
- 17899409. TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPLE BITS AND POWER LOSS MANAGEMENT FOR TWO-PASS CORRECTIVE PROGRAMMING simplified abstract (Micron Technology, Inc.)
- 17941831. ADAPTIVE PRE-READ MANAGEMENT IN MULTI-PASS PROGRAMMING simplified abstract (Micron Technology, Inc.)
- 18483091. TEMPORARY PARITY BUFFER ALLOCATION FOR ZONES IN A PARITY GROUP simplified abstract (Micron Technology, Inc.)
- 18511698. MULTI-LAYER CODE RATE ARCHITECTURE FOR COPYBACK BETWEEN PARTITIONS WITH DIFFERENT CODE RATES simplified abstract (Micron Technology, Inc.)
U
- US Patent Application 17830166. MANAGING QUAD-LEVEL CELL COMPACTION STRATEGY OF A MEMORY DEVICE simplified abstract
- US Patent Application 17863000. MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM simplified abstract
- US Patent Application 18232949. MEMORY DEVICES FOR MULTIPLE READ OPERATIONS simplified abstract