17899409. TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPLE BITS AND POWER LOSS MANAGEMENT FOR TWO-PASS CORRECTIVE PROGRAMMING simplified abstract (Micron Technology, Inc.)
Contents
- 1 TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPLE BITS AND POWER LOSS MANAGEMENT FOR TWO-PASS CORRECTIVE PROGRAMMING
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPLE BITS AND POWER LOSS MANAGEMENT FOR TWO-PASS CORRECTIVE PROGRAMMING - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Original Abstract Submitted
TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPLE BITS AND POWER LOSS MANAGEMENT FOR TWO-PASS CORRECTIVE PROGRAMMING
Organization Name
Inventor(s)
Kishore Kumar Muchherla of Fremont CA (US)
Huai-Yuan Tseng of San Ramon CA (US)
Giovanni Maria Paolucci of Milano (IT)
Dave Scott Ebsen of Minnetonka MN (US)
James Fitzpatrick of Laguna Niguel CA (US)
Jeffrey S. Mcneil of Nampa ID (US)
Umberto Siciliani of Rubano (IT)
Daniel J. Hubbard of Boise ID (US)
Walter Di Francesco of Avezzano (IT)
Michele Incarnati of Avezzano (IT)
TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPLE BITS AND POWER LOSS MANAGEMENT FOR TWO-PASS CORRECTIVE PROGRAMMING - A simplified explanation of the abstract
This abstract first appeared for US patent application 17899409 titled 'TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPLE BITS AND POWER LOSS MANAGEMENT FOR TWO-PASS CORRECTIVE PROGRAMMING
Simplified Explanation
The abstract describes a method, apparatus, and system for controlling writing data bits to a memory device using a programming manager.
- The programming manager receives a first set of data bits for programming to memory.
- The programming manager writes a first subset of data bits to a first wordline during a first pass of programming.
- The programming manager writes a second subset of data bits of the first set of data bits to a buffer.
- The programming manager receives a second set of data bits for programming.
- The programming manager writes the second subset of data bits of the first set of data bits to the first wordline during a second pass of programming to increase a bit density of memory cells in the first wordline in response to receiving the second set of data bits.
Potential Applications
- Memory devices
- Data storage systems
- Computer hardware
Problems Solved
- Increasing bit density of memory cells
- Efficient programming of data bits to memory
- Managing data writing processes
Benefits
- Improved memory storage capacity
- Enhanced data writing efficiency
- Increased performance of memory devices
Original Abstract Submitted
Exemplary methods, apparatuses, and systems including a programming manager for controlling writing data bits to a memory device. The programming manager receives a first set of data bits for programming to memory. The programming manager writes a first subset of data bits to a first wordline during a first pass of programming. The programming manager writes a second subset of data bits of the first set of data bits to a buffer. The programming manager receives a second set of data bits for programming. The programming manager writes the second subset of data bits of the first set of data bits to the first wordline during a second pass of programming to increase a bit density of memory cells in the first wordline in response to receiving the second set of data bits.
- Micron Technology, Inc.
- Kishore Kumar Muchherla of Fremont CA (US)
- Huai-Yuan Tseng of San Ramon CA (US)
- Giovanni Maria Paolucci of Milano (IT)
- Dave Scott Ebsen of Minnetonka MN (US)
- James Fitzpatrick of Laguna Niguel CA (US)
- Akira Goda of Tokyo (JP)
- Jeffrey S. Mcneil of Nampa ID (US)
- Umberto Siciliani of Rubano (IT)
- Daniel J. Hubbard of Boise ID (US)
- Walter Di Francesco of Avezzano (IT)
- Michele Incarnati of Avezzano (IT)
- G11C16/10
- G11C16/08
- G11C16/34