Category:Sagar Suthram of Portland OR (US)
Sagar Suthram of Portland OR (US)
Executive Summary
Sagar Suthram of Portland OR (US) is an inventor who has filed 8 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (6 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (5 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), and they have worked with companies such as Intel Corporation (8 patents). Their most frequent collaborators include (8 collaborations), (8 collaborations), (7 collaborations).
Patent Filing Activity
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Technology Areas
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List of Technology Areas
- H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
- H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
- H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
- H01L2924/1431 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
- H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 3 patents
- H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 2 patents
- H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/08137 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 2 patents
- H01L2924/1437 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
- H10B12/20 (ELECTRONIC MEMORY DEVICES): 1 patents
- H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
- H01L29/0665 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/42392 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/775 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/7841 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L29/78696 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/473 (by flowing liquids {(): 1 patents
- H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
- H01L24/24 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/08165 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/24051 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/24137 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/01029 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/1435 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents
- H01L2224/08121 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/16238 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/1205 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2224/16145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- G11C11/4091 (Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating): 1 patents
- G11C11/4085 ({Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge}): 1 patents
- G11C11/4094 (Bit-line management or control circuits): 1 patents
- H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2225/06541 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
- H01L2924/1436 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
Companies
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List of Companies
- Intel Corporation: 8 patents
Collaborators
- Abhishek A. Sharma of Portland OR (US) (8 collaborations)
- Wilfred Gomes of Portland OR (US) (8 collaborations)
- Pushkar Sharad Ranade of San Jose CA (US) (7 collaborations)
- Tahir Ghani of Portland OR (US) (4 collaborations)
- Anand S. Murthy of Portland OR (US) (4 collaborations)
- Debendra Mallik of Chandler AZ (US) (4 collaborations)
- Nitin A. Deshpande of Chandler AZ (US) (4 collaborations)
- Ravindranath Vithal Mahajan of Chandler AZ (US) (4 collaborations)
- Joshua Fryman of Corvallis OR (US) (1 collaborations)
- Stephen Morein of San Jose CA (US) (1 collaborations)
- Matthew Adiletta of Bolton MA (US) (1 collaborations)
- Michael Crocker of Portland OR (US) (1 collaborations)
- Aaron Gorius of Upton MA (US) (1 collaborations)
Subcategories
This category has the following 5 subcategories, out of 5 total.
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Pages in category "Sagar Suthram of Portland OR (US)"
The following 69 pages are in this category, out of 69 total.
1
- 17846086. PACKAGE ARCHITECTURE WITH VERTICAL STACKING OF INTEGRATED CIRCUIT DIES HAVING PLANARIZED EDGES simplified abstract (Intel Corporation)
- 17846109. PACKAGE ARCHITECTURE WITH VERTICAL STACKING OF INTEGRATED CIRCUIT DIES HAVING PLANARIZED EDGES AND MULTI-SIDE ROUTING simplified abstract (Intel Corporation)
- 17846129. PACKAGE ARCHITECTURE WITH VERTICALLY STACKED BRIDGE DIES HAVING PLANARIZED EDGES simplified abstract (Intel Corporation)
- 17846153. PACKAGE ARCHITECTURE OF THREE-DIMENSIONAL INTERCONNECT CUBE WITH INTEGRATED CIRCUIT DIES HAVING PLANARIZED EDGES simplified abstract (Intel Corporation)
- 17846173. PACKAGE ARCHITECTURE OF PHOTONIC SYSTEM WITH VERTICALLY STACKED DIES HAVING PLANARIZED EDGES simplified abstract (Intel Corporation)
- 17850044. RECONFIGURABLE VECTOR PROCESSING IN A MEMORY simplified abstract (Intel Corporation)
- 17850090. PERFORMING DISTRIBUTED PROCESSING USING DISTRIBUTED MEMORY simplified abstract (Intel Corporation)
- 17851960. INTEGRATED CIRCUIT STRUCTURES HAVING AOI GATES WITH ROUTING ACROSS NANOWIRES simplified abstract (Intel Corporation)
- 17851967. INTEGRATED CIRCUIT STRUCTURES HAVING MEMORY WITH BACKSIDE DRAM AND POWER DELIVERY simplified abstract (Intel Corporation)
- 17930825. FULL WAFER DEVICE WITH FRONT SIDE PASSIVE ELECTRONIC COMPONENTS simplified abstract (Intel Corporation)
- 17930841. FULL WAFER DEVICE WITH BACK SIDE INTERCONNECTS AND WAFER-SCALE INTEGRATION simplified abstract (Intel Corporation)
- 17933589. HYBRID MANUFACTURING OF ACCESS TRANSISTORS FOR MEMORY simplified abstract (Intel Corporation)
- 17958283. ULTRA-THIN SEMI-METALS FOR LOW TEMPERATURE CONDUCTION simplified abstract (Intel Corporation)
- 18088543. INTEGRATED CIRCUIT STRUCTURES HAVING BACKSIDE POWER DELIVERY AND SIGNAL ROUTING FOR FRONT SIDE DRAM simplified abstract (Intel Corporation)
- 18088552. INTEGRATED CIRCUIT STRUCTURES HAVING BACKSIDE CAPACITORS simplified abstract (Intel Corporation)
- 18089865. INTEGRATED CIRCUIT STRUCTURES HAVING TWO-LEVEL MEMORY simplified abstract (Intel Corporation)
- 18089877. INTEGRATED CIRCUIT STRUCTURES HAVING LOOKUP TABLE DECODERS FOR FPGAS simplified abstract (Intel Corporation)
- 18089931. DEVICES IN A SILICON CARBIDE LAYER COUPLED WITH DEVICES IN A GALLIUM NITRIDE LAYER simplified abstract (Intel Corporation)
- 18089936. COUPLING A LAYER OF SILICON CARBIDE WITH AN ADJACENT LAYER simplified abstract (Intel Corporation)
- 18089945. TRANSISTOR INCLUDING WIDE BAND GAP MATERIALS simplified abstract (Intel Corporation)
- 18089957. DYNAMIC RANDOM-ACCESS MEMORY USING WIDE BAND GAP MATERIALS simplified abstract (Intel Corporation)
- 18089966. TRANSISTOR IN A SILICON CARBIDE LAYER AND A TRANSISTOR IN A GALLIUM NITRIDE LAYER IN A CASCODE DESIGN simplified abstract (Intel Corporation)
- 18090816. INTEGRATED CIRCUIT STRUCTURES HAVING BIT-COST SCALING WITH RELAXED TRANSISTOR AREA simplified abstract (Intel Corporation)
- 18090822. INTEGRATED CIRCUIT STRUCTURES HAVING VERTICAL SHARED GATE HIGH-DRIVE THIN FILM TRANSISTORS simplified abstract (Intel Corporation)
- 18090828. INTEGRATED CIRCUIT STRUCTURES HAVING ROUTING ACROSS LAYERS OF CHANNEL STRUCTURES simplified abstract (Intel Corporation)
- 18148338. MODULAR MEMORY BLOCKS FOR INTEGRATED CIRCUIT DEVICES simplified abstract (Intel Corporation)
- 18148528. PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REGIONS simplified abstract (Intel Corporation)
- 18148533. PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REGIONS simplified abstract (Intel Corporation)
- 18148543. PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REGIONS simplified abstract (Intel Corporation)
- 18312847. STATIC RANDOM-ACCESS MEMORY DEVICES WITH ANGLED TRANSISTORS simplified abstract (Intel Corporation)
- 18314862. LOGIC CIRCUITS USING VERTICAL TRANSISTORS WITH BACKSIDE SOURCE OR DRAIN REGIONS simplified abstract (Intel Corporation)
- 18314875. INTEGRATED CIRCUIT DEVICES WITH ANGLED TRANSISTORS AND ANGLED ROUTING TRACKS simplified abstract (Intel Corporation)
- 18341852. THREE-DIMENSIONAL FLOATING BODY MEMORY (Intel Corporation)
I
- Intel corporation (20240103216). VERTICAL THROUGH-SILICON WAVEGUIDE FABRICATION METHOD AND TOPOLOGIES simplified abstract
- Intel corporation (20240103304). VERTICAL PN JUNCTION PHOTONICS MODULATORS WITH BACKSIDE CONTACTS AND LOW TEMPERATURE OPERATION simplified abstract
- Intel corporation (20240105248). TCAM WITH HYSTERETIC OXIDE MEMORY CELLS simplified abstract
- Intel corporation (20240105582). LOW TEMPERATURE CAPACITIVELY COUPLED DEVICE FOR LOW NOISE CIRCUITS simplified abstract
- Intel corporation (20240105584). BURIED VIA THROUGH FRONT-SIDE AND BACK-SIDE METALLIZATION LAYERS WITH OPTIONAL CYLINDRICAL MIM CAPACITOR simplified abstract
- Intel corporation (20240105585). SOLID STATE ELECTROLYTES FOR BACKEND SUPERCAPACITORS simplified abstract
- Intel corporation (20240105596). INTEGRATED CIRCUIT DEVICES WITH ANGLED INTERCONNECTS simplified abstract
- Intel corporation (20240105635). SELF-ALIGNMENT LAYER WITH LOW-K MATERIAL PROXIMATE TO VIAS simplified abstract
- Intel corporation (20240105677). RECONSTITUTED WAFER WITH SIDE-STACKED INTEGRATED CIRCUIT DIE simplified abstract
- Intel corporation (20240105700). SILICON CARBIDE POWER DEVICES INTEGRATED WITH SILICON LOGIC DEVICES simplified abstract
- Intel corporation (20240105811). FERROELECTRIC TUNNEL JUNCTION DEVICES FOR LOW VOLTAGE AND LOW TEMPERATURE OPERATION simplified abstract
- Intel corporation (20240105860). LOW TEMPERATURE VARACTORS USING VARIABLE CAPACITANCE MATERIALS simplified abstract
- Intel corporation (20240107749). ARRANGEMENTS FOR MEMORY WITH ONE ACCESS TRANSISTOR FOR MULTIPLE CAPACITORS simplified abstract
- Intel corporation (20240113025). ULTRA-THIN SEMI-METALS FOR LOW TEMPERATURE CONDUCTION simplified abstract
- Intel corporation (20240215222). INTEGRATED CIRCUIT STRUCTURES HAVING BACKSIDE POWER DELIVERY AND SIGNAL ROUTING FOR FRONT SIDE DRAM simplified abstract
- Intel corporation (20240215256). INTEGRATED CIRCUIT STRUCTURES HAVING BACKSIDE CAPACITORS simplified abstract
- Intel corporation (20240222228). DEVICES IN A SILICON CARBIDE LAYER COUPLED WITH DEVICES IN A GALLIUM NITRIDE LAYER simplified abstract
- Intel corporation (20240222271). INTEGRATED CIRCUIT STRUCTURES HAVING ROUTING ACROSS LAYERS OF CHANNEL STRUCTURES simplified abstract
- Intel corporation (20240222276). INTEGRATED CIRCUIT STRUCTURES HAVING LOOKUP TABLE DECODERS FOR FPGAS simplified abstract
- Intel corporation (20240222321). PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REGIONS simplified abstract
- Intel corporation (20240222326). PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REGIONS simplified abstract
- Intel corporation (20240222328). PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REGIONS simplified abstract
- Intel corporation (20240222347). MODULAR MEMORY BLOCKS FOR INTEGRATED CIRCUIT DEVICES simplified abstract
- Intel corporation (20240222435). COUPLING A LAYER OF SILICON CARBIDE WITH AN ADJACENT LAYER simplified abstract
- Intel corporation (20240222438). TRANSISTOR INCLUDING WIDE BAND GAP MATERIALS simplified abstract
- Intel corporation (20240222469). TRANSISTOR IN A SILICON CARBIDE LAYER AND A TRANSISTOR IN A GALLIUM NITRIDE LAYER IN A CASCODE DESIGN simplified abstract
- Intel corporation (20240222520). INTEGRATED CIRCUIT STRUCTURES HAVING VERTICAL SHARED GATE HIGH-DRIVE THIN FILM TRANSISTORS simplified abstract
- Intel corporation (20240224488). INTEGRATED CIRCUIT STRUCTURES HAVING TWO-LEVEL MEMORY simplified abstract
- Intel corporation (20240224504). DYNAMIC RANDOM-ACCESS MEMORY USING WIDE BAND GAP MATERIALS simplified abstract
- Intel corporation (20240224508). INTEGRATED CIRCUIT STRUCTURES HAVING BIT-COST SCALING WITH RELAXED TRANSISTOR AREA simplified abstract
- Intel corporation (20240429162). INTEGRATED CIRCUIT DEVICES WITH CONDUCTIVE LINES EXTENDING OVER SCRIBE LINES
- Intel corporation (20250062278). PACKAGE ARCHITECTURES HAVING VERTICALLY STACKED DIES WITH SOLDER INTERCONNECTS
- Intel corporation (20250079263). PACKAGE ARCHITECTURES HAVING VERTICALLY STACKED DIES WITH A COOLING MICROCHANNEL
- Intel corporation (20250079398). PACKAGE ARCHITECTURES HAVING VERTICALLY STACKED DIES AND VOLTAGE REGULATORS
- Intel corporation (20250079399). PACKAGE ARCHITECTURES HAVING VERTICALLY STACKED DIES AS A SOLID STATE BATTERY
Categories:
- Abhishek A. Sharma of Portland OR (US)
- Wilfred Gomes of Portland OR (US)
- Pushkar Sharad Ranade of San Jose CA (US)
- Tahir Ghani of Portland OR (US)
- Anand S. Murthy of Portland OR (US)
- Debendra Mallik of Chandler AZ (US)
- Nitin A. Deshpande of Chandler AZ (US)
- Ravindranath Vithal Mahajan of Chandler AZ (US)
- Joshua Fryman of Corvallis OR (US)
- Stephen Morein of San Jose CA (US)
- Matthew Adiletta of Bolton MA (US)
- Michael Crocker of Portland OR (US)
- Aaron Gorius of Upton MA (US)
- Sagar Suthram of Portland OR (US)
- Inventors
- Inventors filing patents with Intel Corporation