Category:Chung-Hsun Lin of Portland OR US
Chung-Hsun Lin
Chung-Hsun Lin from Portland OR US has applied for patents in technology areas such as H01L29/66, H01L29/06, H01L29/08 with intel corporation.
Patents
Pages in category "Chung-Hsun Lin of Portland OR US"
The following 14 pages are in this category, out of 14 total.
1
- 18370287. INTEGRATED CIRCUIT STRUCTURES WITH PATCH SPACERS (Intel Corporation)
- 18372506. INTEGRATED CIRCUIT STRUCTURES HAVING REDUCED LOCAL LAYOUT EFFECTS (Intel Corporation)
- 18374600. TRENCH CONTACT STRUCTURE WITH ETCH-STOP LAYER (INTEL CORPORATION)
- 18374607. MULTIPLE VOLTAGE THRESHOLD INTEGRATED CIRCUIT STRUCTURE WITH LOCAL LAYOUT EFFECT TUNING (INTEL CORPORATION)
- 18375084. INTEGRATED CIRCUIT STRUCTURE WITH DEEP VIA BAR WIDTH TUNING (INTEL CORPORATION)
- 18471710. DIELECTRIC ISOLATION BETWEEN EPITAXIAL REGIONS AND SUBFIN REGIONS (Intel Corporation)
I
- Intel corporation (20250006734). PERFORMANCE OPTIMIZATION OF TRANSISTORS SHARING CHANNEL STRUCTURES OF VARYING WIDTH
- Intel corporation (20250098260). INTEGRATED CIRCUIT STRUCTURES WITH PATCH SPACERS
- Intel corporation (20250107156). DIELECTRIC ISOLATION BETWEEN EPITAXIAL REGIONS AND SUBFIN REGIONS
- Intel corporation (20250107175). INTEGRATED CIRCUIT STRUCTURES HAVING REDUCED LOCAL LAYOUT EFFECTS
- Intel corporation (20250112120). INTEGRATED CIRCUIT STRUCTURE WITH DEEP VIA BAR WIDTH TUNING
- Intel corporation (20250113559). TRENCH CONTACT STRUCTURE WITH ETCH-STOP LAYER
- Intel corporation (20250113595). MULTIPLE VOLTAGE THRESHOLD INTEGRATED CIRCUIT STRUCTURE WITH LOCAL LAYOUT EFFECT TUNING