Category:Akira Goda of Tokyo (JP)
Akira Goda
Akira Goda from Tokyo (JP) has applied for patents in technology areas such as G11C16/16, G11C16/04, G11C16/28 with micron technology, inc..
Patents
Pages in category "Akira Goda of Tokyo (JP)"
The following 37 pages are in this category, out of 37 total.
1
- 17863000. MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM simplified abstract (Micron Technology, Inc.)
- 17884432. MULTI-LAYER CODE RATE ARCHITECTURE FOR SPECIAL EVENT PROTECTION WITH REDUCED PERFORMANCE PENALTY simplified abstract (Micron Technology, Inc.)
- 17894248. APPARATUS AND METHODS FOR PROGRAMMING DATA STATES OF MEMORY CELLS simplified abstract (Micron Technology, Inc.)
- 17895886. READ COUNTER ADJUSTMENT FOR DELAYING READ DISTURB SCANS simplified abstract (Micron Technology, Inc.)
- 17898779. PADDING CACHED DATA WITH VALID DATA FOR MEMORY FLUSH COMMANDS simplified abstract (Micron Technology, Inc.)
- 17899409. TWO-PASS CORRECTIVE PROGRAMMING FOR MEMORY CELLS THAT STORE MULTIPLE BITS AND POWER LOSS MANAGEMENT FOR TWO-PASS CORRECTIVE PROGRAMMING simplified abstract (Micron Technology, Inc.)
- 17941831. ADAPTIVE PRE-READ MANAGEMENT IN MULTI-PASS PROGRAMMING simplified abstract (Micron Technology, Inc.)
- 18223298. PROGRAM REFRESH WITH GATE-INDUCED DRAIN LEAKAGE simplified abstract (Micron Technology, Inc.)
- 18407366. SELF-OPTIMIZING CORRECTIVE READ OFFSETS WITH LATERAL CHARGE MIGRATION PROXIES simplified abstract (Micron Technology, Inc.)
- 18419895. MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM simplified abstract (Micron Technology, Inc.)
- 18439662. STRING DRIVER ASSEMBLIES INCLUDING TWO-DIMENSIONAL MATERIALS, AND RELATED MEMORY DEVICES simplified abstract (Lodestar Licensing Group LLC)
- 18483091. TEMPORARY PARITY BUFFER ALLOCATION FOR ZONES IN A PARITY GROUP simplified abstract (Micron Technology, Inc.)
- 18505855. MEDIA MANAGEMENT SCANNING WITH UNIFIED CRITERIA TO ALLEVIATE FAST AND LATENT READ DISTURB simplified abstract (Micron Technology, Inc.)
- 18595703. APPARATUS AND METHODS FOR PROGRAMMING DATA STATES OF MEMORY CELLS simplified abstract (Micron Technology, Inc.)
- 18604411. BOOST-BY-DECK DURING A PROGRAM OPERATION ON A MEMORY DEVICE simplified abstract (Micron Technology, Inc.)
- 18612028. MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL simplified abstract (Micron Technology, Inc.)
- 18651590. MULTIPLE-PASS PROGRAMMING OF MEMORY CELLS USING TEMPORARY PARITY GENERATION simplified abstract (Micron Technology, Inc.)
- 18672645. PADDING CACHED DATA WITH VALID DATA FOR MEMORY FLUSH COMMANDS simplified abstract (Micron Technology, Inc.)
- 18753389. MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION simplified abstract (Micron Technology, Inc.)
- 18768970. SELECTIVELY ERASING ONE OF MULTIPLE ERASE BLOCKS COUPLED TO A SAME STRING USING GATE INDUCED DRAIN LEAKAGE (Micron Technology, Inc.)
- 18821886. Reduction of Errors in Data Retrieved from a Memory Device to Apply an Error Correction Code of a Predetermined Code Rate (Micron Technology, Inc.)
- 18895236. READ COUNTER ADJUSTMENT FOR DELAYING READ DISTURB SCANS (Micron Technology, Inc.)
- 18895273. QUICK CHARGE LOSS MITIGATION USING TWO-PASS CONTROLLED DELAY (Micron Technology, Inc.)
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- Micron technology, inc. (20240160359). MODIFIED READ COUNTER INCREMENTING SCHEME IN A MEMORY SUB-SYSTEM simplified abstract
- Micron technology, inc. (20240161838). MEDIA MANAGEMENT SCANNING WITH UNIFIED CRITERIA TO ALLEVIATE FAST AND LATENT READ DISTURB simplified abstract
- Micron technology, inc. (20240231617). MEMORY DEVICE PROGRAMMING TECHNIQUE FOR INCREASED BITS PER CELL simplified abstract
- Micron technology, inc. (20240231642). SELF-OPTIMIZING CORRECTIVE READ OFFSETS WITH LATERAL CHARGE MIGRATION PROXIES simplified abstract
- Micron technology, inc. (20240302999). MULTIPLE-PASS PROGRAMMING OF MEMORY CELLS USING TEMPORARY PARITY GENERATION simplified abstract
- Micron technology, inc. (20240311309). PADDING CACHED DATA WITH VALID DATA FOR MEMORY FLUSH COMMANDS simplified abstract
- Micron technology, inc. (20240320144). APPARATUS AND METHODS FOR PROGRAMMING DATA STATES OF MEMORY CELLS simplified abstract
- Micron technology, inc. (20240339163). BOOST-BY-DECK DURING A PROGRAM OPERATION ON A MEMORY DEVICE simplified abstract
- Micron technology, inc. (20240347128). MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION simplified abstract
- Micron technology, inc. (20240411459). CODE RATE AS FUNCTION OF LOGICAL SATURATION
- Micron technology, inc. (20240413145). MEMORY DEVICES INCLUDING CONTROL LOGIC REGIONS
- Micron technology, inc. (20240419544). Reduction of Errors in Data Retrieved from a Memory Device to Apply an Error Correction Code of a Predetermined Code Rate
- Micron technology, inc. (20250087275). SELECTIVELY ERASING ONE OF MULTIPLE ERASE BLOCKS COUPLED TO A SAME STRING USING GATE INDUCED DRAIN LEAKAGE