PROGRAM REFRESH WITH GATE-INDUCED DRAIN LEAKAGE

Organization Name

Micron Technology, Inc.

Inventor(s)

Huai-Yuan Tseng of San Ramon CA (US)

Eric N. Lee of San Jose CA (US)

Akira Goda of Tokyo (JP)

Kishore Kumar Muchherla of San Jose CA (US)

Tomoharu Tanaka of Kanagawa (JP)

PROGRAM REFRESH WITH GATE-INDUCED DRAIN LEAKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18223298 titled 'PROGRAM REFRESH WITH GATE-INDUCED DRAIN LEAKAGE

Simplified Explanation

The memory device described in the patent application includes a memory array with wordlines and at least one string of cells. Each cell in the string of cells can be accessed using a specific wordline. The device also includes control logic that can generate gate-induced drain leakage (GIDL) in the string of cells and apply a grounding voltage to a set of wordlines to ground each cell in the string of cells. The grounding voltage enables the transport of positive charge carriers generated by the GIDL. These positive charge carriers can neutralize a buildup of negative charge carriers generated during a seeding phase of a program refresh operation.

The memory device has a memory array with wordlines and a string of cells.
Each cell in the string of cells can be accessed using a specific wordline.
The control logic can generate GIDL in the string of cells.
The control logic can apply a grounding voltage to a set of wordlines to ground each cell in the string of cells.
The grounding voltage enables the transport of positive charge carriers generated by the GIDL.
The positive charge carriers neutralize a buildup of negative charge carriers generated during a seeding phase of a program refresh operation.

Potential Applications:

Memory devices with improved performance and reliability.
Memory devices suitable for use in various electronic devices such as smartphones, computers, and servers.
Memory devices that can efficiently refresh data without significant degradation.

Problems Solved:

Addressing the buildup of negative charge carriers during a program refresh operation.
Enhancing the efficiency and reliability of memory devices.
Improving the performance of memory devices during data storage and retrieval operations.

Benefits:

Improved data retention and reliability in memory devices.
Enhanced performance and efficiency in memory operations.
Extended lifespan of memory devices.
Reduced power consumption in memory devices.

Original Abstract Submitted

A memory device includes a memory array including wordlines and at least one string of cells. Each cell of the at least one string of cells is addressable by a respective wordline. The memory device further includes control logic, operatively coupled to the memory array, to perform operations including generating gate-induced drain leakage (GIDL) with respect to the at least one string of cells, and causing a grounding voltage to be applied to a set of wordlines to ground each cell of the at least one string of cells addressable by each wordline of the set of wordlines. The grounding voltage applied to the set of wordlines enables transport of positive charge carriers generated by the GIDL. In some embodiments, the positive charge carriers neutralize a buildup of negative charge carriers generated during a seeding phase of a program refresh operation.