Micron technology, inc. (20240347128). MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION simplified abstract
MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION
Organization Name
Inventor(s)
Kishore Kumar Muchherla of Fremont CA (US)
Dave Scott Ebsen of Minnetonka MN (US)
Lakshmi Kalpana Vakati of San Jose CA (US)
Jiangli Zhu of San Jose CA (US)
Sanjay Subbarao of Irvine CA (US)
Vivek Shivhare of Milpitas CA (US)
Fangfang Zhu of San Jose CA (US)
MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240347128 titled 'MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION
The abstract of this patent application describes methods, systems, and apparatuses for retrieving a defectivity footprint of a portion of memory composed of multiple blocks. Based on this defectivity footprint, a deck programming order is determined for a current block, which is composed of multiple decks. The deck programming order dictates the order in which the multiple decks are programmed.
- The technology involves retrieving defectivity footprints of memory blocks and determining programming orders based on these footprints.
- The innovation optimizes the programming sequence of multiple decks within a memory block to improve efficiency and reliability.
- By programming decks in a specific order based on defectivity footprints, the technology aims to enhance memory performance and longevity.
- This approach allows for targeted programming of memory blocks, reducing errors and improving overall system performance.
- The system's ability to adapt programming orders based on defectivity footprints can lead to more efficient memory management and maintenance.
Potential Applications: The technology can be applied in various industries such as semiconductor manufacturing, data storage, and computer hardware development.
Problems Solved: The technology addresses issues related to memory block programming efficiency, error reduction, and overall system performance optimization.
Benefits: Improved memory performance, reduced errors, enhanced system reliability, and increased longevity of memory components.
Commercial Applications: The technology can be utilized in the production of memory devices, data centers, and other computing systems to enhance performance and reliability.
Questions about the technology: 1. How does the technology determine the deck programming order based on defectivity footprints? 2. What are the potential implications of optimizing memory block programming in various industries?
Frequently Updated Research: Stay updated on advancements in memory management systems, defectivity analysis, and programming optimization techniques to enhance the technology's capabilities.
Original Abstract Submitted
methods, systems, and apparatuses include retrieving a defectivity footprint of a portion of memory, the portion of memory composed of multiple blocks. a deck programming order is determined, based on the defectivity footprint, for a current block of the multiple blocks. the current block is composed of multiple decks. the deck programming order is an order in which the multiple decks are programmed. the multiple decks programmed according to the determined deck programming order.
- Micron technology, inc.
- Kishore Kumar Muchherla of Fremont CA (US)
- Akira Goda of Tokyo (JP)
- Dave Scott Ebsen of Minnetonka MN (US)
- Lakshmi Kalpana Vakati of San Jose CA (US)
- Jiangli Zhu of San Jose CA (US)
- Peter Feeley of Boise ID (US)
- Sanjay Subbarao of Irvine CA (US)
- Vivek Shivhare of Milpitas CA (US)
- Fangfang Zhu of San Jose CA (US)
- G11C29/52
- G11C29/02
- CPC G11C29/52