17941831. ADAPTIVE PRE-READ MANAGEMENT IN MULTI-PASS PROGRAMMING simplified abstract (Micron Technology, Inc.)
ADAPTIVE PRE-READ MANAGEMENT IN MULTI-PASS PROGRAMMING
Organization Name
Inventor(s)
Kishore Kumar Muchherla of Fremont CA (US)
Huai-Yuan Tseng of San Ramon CA (US)
Dung V. Nguyen of San Jose CA (US)
Giovanni Maria Paolucci of Milano (IT)
James Fitzpatrick of Laguna Niguel CA (US)
Eric N. Lee of San Jose CA (US)
Dave Scott Ebsen of Minnetonka MN (US)
Tomoharu Tanaka of Kanagawa (JP)
ADAPTIVE PRE-READ MANAGEMENT IN MULTI-PASS PROGRAMMING - A simplified explanation of the abstract
This abstract first appeared for US patent application 17941831 titled 'ADAPTIVE PRE-READ MANAGEMENT IN MULTI-PASS PROGRAMMING
Simplified Explanation
The abstract describes an adaptive pre-read manager for controlling pre-reads of a memory device, which involves programming data bits to memory in multiple passes based on operating conditions.
- The adaptive pre-read manager receives a first set of data bits for programming to memory.
- It performs a first pass of programming with a subset of data bits from the set.
- It compares threshold operating differences to differences between operating conditions during the first pass.
- An internal pre-read of the programmed subset of data bits is performed.
- A second pass of programming is done using the internal pre-read and another subset of data bits.
Potential Applications
The technology described in the patent application could be applied in various fields such as:
- Memory devices
- Data storage systems
- Computer hardware
Problems Solved
This technology addresses the following issues:
- Improving programming efficiency in memory devices
- Enhancing data reliability and accuracy
- Optimizing performance based on operating conditions
Benefits
The benefits of this technology include:
- Increased speed and efficiency in programming data bits
- Enhanced data integrity and error correction capabilities
- Adaptability to different operating conditions for optimal performance
Potential Commercial Applications
Optimizing Memory Programming for Enhanced Performance
Unanswered Questions
How does the adaptive pre-read manager handle different types of memory devices?
The patent abstract does not specify if the technology is compatible with various memory device types such as NAND, NOR, or DRAM.
What impact does the adaptive pre-read manager have on power consumption in memory devices?
The abstract does not mention how the technology affects power usage during programming and pre-reading processes.
Original Abstract Submitted
Exemplary methods, apparatuses, and systems include an adaptive pre-read manager for controlling pre-reads of the memory device. The adaptive pre-read manager receives a first set of data bits for programming to memory. The adaptive pre-read manager performing a first pass of programming including a first subset of data bits from the set of data bits. The adaptive pre-read manager compares a set of threshold operating differences to a set of differences between multiple operating conditions during the first pass of programming and current operating conditions. The adaptive pre-read manager performs an internal pre-read of the programmed first subset of data bits. The adaptive pre-read manager performs a second pass of programming using the internal pre-read and a second subset of data bits from the first set of data bits.
- Micron Technology, Inc.
- Kishore Kumar Muchherla of Fremont CA (US)
- Huai-Yuan Tseng of San Ramon CA (US)
- Akira Goda of Tokyo (JP)
- Dung V. Nguyen of San Jose CA (US)
- Giovanni Maria Paolucci of Milano (IT)
- James Fitzpatrick of Laguna Niguel CA (US)
- Eric N. Lee of San Jose CA (US)
- Dave Scott Ebsen of Minnetonka MN (US)
- Tomoharu Tanaka of Kanagawa (JP)
- G11C16/10
- G11C16/26
- G11C16/32
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