Category:Yu-Chung Lien of San Jose CA US
Yu-Chung Lien
Yu-Chung Lien from San Jose CA US has applied for patents in technology areas such as G06F3/06 with micron technology, inc..
Patents
Pages in category "Yu-Chung Lien of San Jose CA US"
The following 24 pages are in this category, out of 24 total.
1
- 18782517. GANGED READ OPERATION FOR MULTIPLE SUB-BLOCKS (Micron Technology, Inc.)
- 18782536. CONCURRENT READ ERROR HANDLING OPERATIONS (Micron Technology, Inc.)
- 18786016. PERFORMING CORRECTIVE SENSE OPERATIONS IN MEMORY (Micron Technology, Inc.)
- 18786100. PROGRAMMING DATA IN MEMORY (MICRON TECHNOLOGY, INC.)
- 18786301. MULTI-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES (Micron Technology, Inc.)
- 18968924. CHARGE LOSS MITIGATION THROUGH DYNAMIC PROGRAMMING SEQUENCE (Micron Technology, Inc.)
- 18975937. ADAPTIVE BITLINE VOLTAGE FOR MEMORY OPERATIONS (Micron Technology, Inc.)
2
- 20250166696. Management Dynamic (Micron Technology, .)
- 20250166708. Adaptive Sensing Time (Micron Technology, .)
- 20250166709. Independent Sensing Ti (Micron Technology, .)
- 20250181267. Dynamic Read Level Tri (Micron Technology, .)
- 20250190126. Managing Read Commands (Micron Technology, .)
- 20250218528. Read Disturb Charge Lo (Micron Technology, .)
M
- Micron technology, inc. (20240256155). MEMORY READ OPERATION USING A VOLTAGE PATTERN BASED ON A READ COMMAND TYPE
- Micron technology, inc. (20250006269). MANAGING ALLOCATION OF BLOCKS IN A MEMORY SUB-SYSTEM
- Micron technology, inc. (20250006270). MANAGING ALLOCATION OF BLOCKS ACROSS PLANES IN A MEMORY SUB-SYSTEM
- Micron technology, inc. (20250014657). SELECTIVE USE OF A WORD LINE MONITORING PROCEDURE FOR RELIABILITY-RISK WORD LINES
- Micron technology, inc. (20250094063). CHARGE LOSS MITIGATION THROUGH DYNAMIC PROGRAMMING SEQUENCE
- Micron technology, inc. (20250103215). ADAPTIVE BITLINE VOLTAGE FOR MEMORY OPERATIONS
- Micron technology, inc. (20250103412). MULTI-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES
- Micron technology, inc. (20250104779). GANGED READ OPERATION FOR MULTIPLE SUB-BLOCKS
- Micron technology, inc. (20250104796). PERFORMING CORRECTIVE SENSE OPERATIONS IN MEMORY
- Micron technology, inc. (20250110827). CONCURRENT READ ERROR HANDLING OPERATIONS
- Micron technology, inc. (20250130731). PROGRAMMING DATA IN MEMORY