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Micron technology, inc. (20250103412). MULTI-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES

From WikiPatents

MULTI-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES

Organization Name

micron technology, inc.

Inventor(s)

Yu-Chung Lien of San Jose CA US

Ching-Huang Lu of Fremont CA US

Zhenming Zhou of San Jose CA US

Jun Wan of San Jose CA US

MULTI-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES

This abstract first appeared for US patent application 20250103412 titled 'MULTI-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES

Original Abstract Submitted

in some implementations, a memory device may receive a program command instructing the memory device to program host data to a word line associated with a memory. the memory device may determine a program erase cycle (pec) count associated with the word line. the memory device may determine, based on the pec count, a selected program scheme to be used to program the host data to the word line, wherein the selected program scheme is one of a single-fine program scheme or a multi-fine program scheme. the memory device may execute the program command by performing the selected program scheme.

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