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Category:SiFive, Inc.
Pages in category "SiFive, Inc."
The following 40 pages are in this category, out of 40 total.
1
- 18115971. Stalling Issue Queue Entries Until Consecutive Allocated Entries are Available for Segmented Stores simplified abstract (SiFive, Inc.)
- 18132572. Downgrading a Permission Associated with Data Stored in a Cache simplified abstract (SiFive, Inc.)
- 18133022. Orderability of Operations simplified abstract (SiFive, Inc.)
- 18182772. Canceling Prefetch of Cache Blocks Based on an Address and a Bit Field simplified abstract (SiFive, Inc.)
- 18182778. Prefetching Cache Blocks Based on an Address for a Group and a Bit Field simplified abstract (SiFive, Inc.)
- 18328839. Tracking of Data Readiness for Load and Store Operations simplified abstract (SiFive, Inc.)
- 18337652. Out-Of-Order Vector Iota Calculations simplified abstract (SiFive, Inc.)
- 18338643. RE-TRIGGERING WAKE-UP TO HANDLE TIME SKEW BETWEEN SCALAR AND VECTOR SIDES simplified abstract (SiFive, Inc.)
- 18341091. Cache Coherency State Request Vector Encoding and Use Thereof simplified abstract (SiFive, Inc.)
- 18341093. Transmitting a Response with a Request and State Information about the Request simplified abstract (SiFive, Inc.)
- 18341217. Speculative Request Indicator in Request Message simplified abstract (SiFive, Inc.)
- 18341244. Eviction Operations Based on Eviction Message Types simplified abstract (SiFive, Inc.)
- 18476933. SELECTABLE GRANULARITY PERFORMANCE MONITOR simplified abstract (SiFive, Inc.)
- 18483260. Flexible Power Management Interface simplified abstract (SiFive, Inc.)
- 18497170. BIT PATTERN MATCHING HARDWARE PREFETCHER simplified abstract (SiFive, Inc.)
- 18497436. Selective Transfer of Data Including a Priority Byte simplified abstract (SiFive, Inc.)
- 18524149. Stateful Vector Group Permutation with Storage Reuse simplified abstract (SiFive, Inc.)
- 18524185. Transfer Buffer Between a Scalar Pipeline and Vector Pipeline simplified abstract (SiFive, Inc.)
- 18524222. Vector Load Store Operations in a Vector Pipeline Using a Single Operation in a Load Store Unit simplified abstract (SiFive, Inc.)
- 18524391. Accelerated Vector Reduction Operations simplified abstract (SiFive, Inc.)
- 18524982. DATA STORAGE IN NON-INCLUSIVE CACHE simplified abstract (SiFive, Inc.)
- 18527181. Relative Age Tracking for Entries in a Buffer simplified abstract (SiFive, Inc.)
- 18527215. Variable Depth Pipeline for Error Correction simplified abstract (SiFive, Inc.)
- 18577677. Debug In System On A Chip With Securely Partitioned Memory Space simplified abstract (SiFive, Inc.)
- 18747399. PAGE TABLE ENTRY CACHES WITH MULTIPLE TAG LENGTHS simplified abstract (SiFive, Inc.)
- 18747403. INTEGRATED CIRCUIT GENERATION WITH COMPOSABLE INTERCONNECT simplified abstract (SiFive, Inc.)
- 18747410. INTEGRATED CIRCUIT GENERATION WITH IMPROVED INTERCONNECT simplified abstract (SiFive, Inc.)
- 18747412. CONFIGURING A PREFETCHER ASSOCIATED WITH A PROCESSOR CORE simplified abstract (SiFive, Inc.)
- 18747414. STORE-TO-LOAD FORWARDING FOR PROCESSOR PIPELINES simplified abstract (SiFive, Inc.)
- 18758980. CYCLE ACCURATE TRACING OF VECTOR INSTRUCTIONS simplified abstract (SiFive, Inc.)
2
- 20250173277. Memory Protection Gather-scat (SiFive, .)
- 20250173281. Orderability Operations (SiFive, .)
- 20250181355. Dependency Tracking Chaining (SiFive, .)
- 20250181466. Hardware Test Mode Processor (SiFive, .)
- 20250181507. Eviction Operations Based Evic (SiFive, .)
- 20250181519. Concurrent Support Multiple C (SiFive, .)
- 20250190358. Address Boundary Functions Ph (SiFive, .)