Category:James Valerio of North Plains OR (US)
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James Valerio of North Plains OR (US)
Executive Summary
James Valerio of North Plains OR (US) is an inventor who has filed 6 patents. Their primary areas of innovation include {using instruction pipelines} (2 patents), {Arithmetic instructions} (2 patents), {Instructions to perform operations on packed data, e.g. vector, tile or matrix operations} (2 patents), and they have worked with companies such as Intel Corporation (6 patents). Their most frequent collaborators include (5 collaborations), (5 collaborations), (4 collaborations).
Patent Filing Activity
Technology Areas
List of Technology Areas
- G06F9/3867 ({using instruction pipelines}): 2 patents
- G06F9/3001 ({Arithmetic instructions}): 2 patents
- G06F9/30036 ({Instructions to perform operations on packed data, e.g. vector, tile or matrix operations}): 2 patents
- G06F9/3887 ({controlled by a single instruction for multiple data lanes [SIMD]}): 2 patents
- G06F7/483 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F9/30192 ({according to data descriptor, e.g. dynamic data typing}): 1 patents
- G06T15/005 ({General purpose rendering architectures}): 1 patents
- G06F9/3016 ({Decoding the operand specifier, e.g. specifier format}): 1 patents
- G06F9/5033 (Allocation of resources, e.g. of the central processing unit [CPU]): 1 patents
- G06F9/30101 ({Special purpose registers}): 1 patents
- G06F15/7839 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F7/5443 (for evaluating functions by calculation {(): 1 patents
- G06F7/575 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F7/588 (Random or pseudo-random number generators): 1 patents
- G06F9/30014 ({with variable precision}): 1 patents
- G06F9/3004 ({to perform operations on memory}): 1 patents
- G06F9/30043 ({LOAD or STORE instructions; Clear instruction}): 1 patents
- G06F9/30047 ({Prefetch instructions; cache control instructions}): 1 patents
- G06F9/30065 ({Loop control instructions; iterative instructions, e.g. LOOP, REPEAT}): 1 patents
- G06F9/30079 ({Pipeline control instructions, e.g. multicycle NOP}): 1 patents
- G06F9/5011 (Allocation of resources, e.g. of the central processing unit [CPU]): 1 patents
- G06F9/5077 (Allocation of resources, e.g. of the central processing unit [CPU]): 1 patents
- G06F12/0215 ({with look ahead addressing means}): 1 patents
- G06F12/0238 ({Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory}): 1 patents
- G06F12/0246 ({in block erasable memory, e.g. flash memory}): 1 patents
- G06F12/0607 (Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication (): 1 patents
- G06F12/0802 (Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches): 1 patents
- G06F12/0804 (with main memory updating (): 1 patents
- G06F12/0811 (in hierarchically structured memory systems, e.g. virtual memory systems): 1 patents
- G06F12/0862 (with prefetch): 1 patents
- G06F12/0866 (for peripheral storage systems, e.g. disk cache): 1 patents
- G06F12/0871 (Allocation or management of cache space): 1 patents
- G06F12/0875 (with dedicated cache, e.g. instruction or stack): 1 patents
- G06F12/0882 (in hierarchically structured memory systems, e.g. virtual memory systems): 1 patents
- G06F12/0891 (using clearing, invalidating or resetting means): 1 patents
- G06F12/0893 (Caches characterised by their organisation or structure): 1 patents
- G06F12/0895 (in hierarchically structured memory systems, e.g. virtual memory systems): 1 patents
- G06F12/0897 (in hierarchically structured memory systems, e.g. virtual memory systems): 1 patents
- G06F12/1009 (Address translation): 1 patents
- G06F12/128 (Replacement control): 1 patents
- G06F15/8046 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F17/16 (Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition): 1 patents
- G06F17/18 (for evaluating statistical data {, e.g. average values, frequency distributions, probability functions, regression analysis (forecasting specially adapted for a specific administrative, business or logistic context): 1 patents
- G06T1/20 (Processor architectures; Processor configuration, e.g. pipelining): 1 patents
- G06T1/60 (Memory management): 1 patents
- H03M7/46 (CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means): 1 patents
- G06F9/3802 ({Instruction prefetching}): 1 patents
- G06F9/3818 ({Decoding for concurrent execution}): 1 patents
- G06F2212/1021 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F2212/1044 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F2212/302 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F2212/401 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F2212/455 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F2212/60 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06N3/08 (Learning methods): 1 patents
- G06T15/06 (Ray-tracing): 1 patents
Companies
List of Companies
- Intel Corporation: 6 patents
Collaborators
- Supratim Pal of Folsom CA (US) (5 collaborations)
- Jiasheng Chen of El Dorado Hills CA (US) (5 collaborations)
- Guei-Yuan Lueh of San Jose CA (US) (4 collaborations)
- Fangwen Fu of Folsom CA (US) (4 collaborations)
- Kevin Hurd of Flagler Beach FL (US) (3 collaborations)
- Jorge E. Parra Osorio of El Dorado Hills CA (US) (3 collaborations)
- Christopher Spencer of Chuluota FL (US) (3 collaborations)
- Pradeep K. Golconda of El Dorado Hills CA (US) (3 collaborations)
- Mukundan Swaminathan of San Ramon CA (US) (3 collaborations)
- Nicholas Murphy (3 collaborations)
- Clifford Gibson (3 collaborations)
- Buqi Cheng of San Jose CA (US) (3 collaborations)
- Wei Xiong of Fremont CA (US) (2 collaborations)
- Hongzheng Li of Sunnyvale CA (US) (2 collaborations)
- Shuai Mu of San Diego CA (US) (2 collaborations)
- Jorge Eduardo Parra Osorio of El Dorado Hills CA (US) (2 collaborations)
- Vasanth Ranganathan of El Dorado Hills CA (US) (2 collaborations)
- Takashi Nakagawa of Folsom CA (US) (1 collaborations)
- Li-An Tang of El Dorado Hills CA (US) (1 collaborations)
- Kaiyu Chen of San Jose CA (US) (1 collaborations)
- Pradeep Golconda of El Dorado Hills CA (US) (1 collaborations)
- Brent Schwartz of Sacramento CA (US) (1 collaborations)
- Sabareesh Ganapathy (1 collaborations)
- Peter Caday of Beaverton OR (US) (1 collaborations)
- Wei-Yu Chen of San Jose CA (US) (1 collaborations)
- Po-Yu Chen of San Diego CA (US) (1 collaborations)
- Timothy Bauer of Hillsboro OR (US) (1 collaborations)
- Maxim Kazakov of San Diego CA (US) (1 collaborations)
- Stanley Gambarin of Belmont CA (US) (1 collaborations)
- Samir Pandya of Folsom CA (US) (1 collaborations)
- Abhishek R. Appu of El Dorado Hills CA (US) (1 collaborations)
- Altug Koker of El Dorado Hills CA (US) (1 collaborations)
- Aravindh Anantaraman of Folsom CA (US) (1 collaborations)
- Elmoustapha Ould-Ahmed-Vall of Chandler AZ (US) (1 collaborations)
- Valentin Andrei of San Jose CA (US) (1 collaborations)
- Nicolas Galoppo Von Borries of Portland OR (US) (1 collaborations)
- Varghese George of Folsom CA (US) (1 collaborations)
- Mike Macpherson of Portland OR (US) (1 collaborations)
- Subramaniam Maiyuran of Gold River CA (US) (1 collaborations)
- Joydeep Ray of Folsom CA (US) (1 collaborations)
- Lakshminarayana Striramassarma of Folsom CA (US) (1 collaborations)
- Scott Janus of Loomis CA (US) (1 collaborations)
- Brent Insko of Portland OR (US) (1 collaborations)
- Kamal Sinha of Rancho Cordova CA (US) (1 collaborations)
- Arthur Hunter of Cameron Park CA (US) (1 collaborations)
- Prasoonkumar Surti of Folsom CA (US) (1 collaborations)
- David Puffer of Tempe AZ (US) (1 collaborations)
- Ankur N. Shah of Folsom CA (US) (1 collaborations)
Subcategories
This category has the following 9 subcategories, out of 9 total.
A
J
P
S
V
Pages in category "James Valerio of North Plains OR (US)"
The following 18 pages are in this category, out of 18 total.
1
- 17884755. CONCURRENT COMPUTE CONTEXT simplified abstract (Intel Corporation)
- 17944500. OFFSET SCALING IN LOAD/STORE MESSAGES simplified abstract (Intel Corporation)
- 17949904. BASE PLUS OFFSET ADDRESSING FOR LOAD/STORE MESSAGES simplified abstract (Intel Corporation)
- 17958213. SYNCHRONIZATION UTILIZING LOCAL TEAM BARRIERS FOR THREAD TEAM PROCESSING simplified abstract (Intel Corporation)
- 18148993. SYNCHRONIZATION FOR DATA MULTICAST IN COMPUTE CORE CLUSTERS simplified abstract (Intel Corporation)
- 18148997. DATA MULTICAST IN COMPUTE CORE CLUSTERS simplified abstract (Intel Corporation)
- 18336821. COARSE AND FINE FILTERING FOR GPU HARDWARE-BASED PERFORMANCE MONITORING (Intel Corporation)
- 18453861. INSTRUCTION ENCODING TO IMPLEMENT INCREASED REGISTER CAPACITY PER THREAD (Intel Corporation)
- 18453867. DISTRIBUTED REGISTER FILE CACHE TO REDUCE L1 BANDWIDTH REQUIREMENTS (Intel Corporation)
- 18516716. SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU CONFIGURATION simplified abstract (Intel Corporation)
- 18793247. MULTI-TILE MEMORY MANAGEMENT (Intel Corporation)
I
- Intel corporation (20240111609). SYNCHRONIZATION UTILIZING LOCAL TEAM BARRIERS FOR THREAD TEAM PROCESSING simplified abstract
- Intel corporation (20240220254). DATA MULTICAST IN COMPUTE CORE CLUSTERS simplified abstract
- Intel corporation (20240220335). SYNCHRONIZATION FOR DATA MULTICAST IN COMPUTE CORE CLUSTERS simplified abstract
- Intel corporation (20240330001). BASE PLUS OFFSET ADDRESSING FOR LOAD/STORE MESSAGES simplified abstract
- Intel corporation (20240420274). COARSE AND FINE FILTERING FOR GPU HARDWARE-BASED PERFORMANCE MONITORING
- Intel corporation (20250068423). INSTRUCTION ENCODING TO IMPLEMENT INCREASED REGISTER CAPACITY PER THREAD
- Intel corporation (20250068473). DISTRIBUTED REGISTER FILE CACHE TO REDUCE L1 BANDWIDTH REQUIREMENTS
Categories:
- Supratim Pal of Folsom CA (US)
- Jiasheng Chen of El Dorado Hills CA (US)
- Guei-Yuan Lueh of San Jose CA (US)
- Fangwen Fu of Folsom CA (US)
- Kevin Hurd of Flagler Beach FL (US)
- Jorge E. Parra Osorio of El Dorado Hills CA (US)
- Christopher Spencer of Chuluota FL (US)
- Pradeep K. Golconda of El Dorado Hills CA (US)
- Mukundan Swaminathan of San Ramon CA (US)
- Nicholas Murphy
- Clifford Gibson
- Buqi Cheng of San Jose CA (US)
- Wei Xiong of Fremont CA (US)
- Hongzheng Li of Sunnyvale CA (US)
- Shuai Mu of San Diego CA (US)
- Jorge Eduardo Parra Osorio of El Dorado Hills CA (US)
- Vasanth Ranganathan of El Dorado Hills CA (US)
- Takashi Nakagawa of Folsom CA (US)
- Li-An Tang of El Dorado Hills CA (US)
- Kaiyu Chen of San Jose CA (US)
- Pradeep Golconda of El Dorado Hills CA (US)
- Brent Schwartz of Sacramento CA (US)
- Sabareesh Ganapathy
- Peter Caday of Beaverton OR (US)
- Wei-Yu Chen of San Jose CA (US)
- Po-Yu Chen of San Diego CA (US)
- Timothy Bauer of Hillsboro OR (US)
- Maxim Kazakov of San Diego CA (US)
- Stanley Gambarin of Belmont CA (US)
- Samir Pandya of Folsom CA (US)
- Abhishek R. Appu of El Dorado Hills CA (US)
- Altug Koker of El Dorado Hills CA (US)
- Aravindh Anantaraman of Folsom CA (US)
- Elmoustapha Ould-Ahmed-Vall of Chandler AZ (US)
- Valentin Andrei of San Jose CA (US)
- Nicolas Galoppo Von Borries of Portland OR (US)
- Varghese George of Folsom CA (US)
- Mike Macpherson of Portland OR (US)
- Subramaniam Maiyuran of Gold River CA (US)
- Joydeep Ray of Folsom CA (US)
- Lakshminarayana Striramassarma of Folsom CA (US)
- Scott Janus of Loomis CA (US)
- Brent Insko of Portland OR (US)
- Kamal Sinha of Rancho Cordova CA (US)
- Arthur Hunter of Cameron Park CA (US)
- Prasoonkumar Surti of Folsom CA (US)
- David Puffer of Tempe AZ (US)
- Ankur N. Shah of Folsom CA (US)
- James Valerio of North Plains OR (US)
- Inventors
- Inventors filing patents with Intel Corporation