Category:Supratim Pal of Folsom CA (US)
Appearance
Supratim Pal of Folsom CA (US)
Executive Summary
Supratim Pal of Folsom CA (US) is an inventor who has filed 6 patents. Their primary areas of innovation include {Arithmetic instructions} (2 patents), {controlled by a single instruction for multiple data lanes [SIMD]} (2 patents), ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models (1 patents), and they have worked with companies such as Intel Corporation (6 patents). Their most frequent collaborators include (6 collaborations), (5 collaborations), (4 collaborations).
Patent Filing Activity
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Technology Areas
List of Technology Areas
- G06F9/3001 ({Arithmetic instructions}): 2 patents
- G06F9/3887 ({controlled by a single instruction for multiple data lanes [SIMD]}): 2 patents
- G06F7/483 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F9/30192 ({according to data descriptor, e.g. dynamic data typing}): 1 patents
- G06F9/3867 ({using instruction pipelines}): 1 patents
- G06T15/005 ({General purpose rendering architectures}): 1 patents
- G06F9/3016 ({Decoding the operand specifier, e.g. specifier format}): 1 patents
- G06F9/30036 ({Instructions to perform operations on packed data, e.g. vector, tile or matrix operations}): 1 patents
- G06F9/5033 (Allocation of resources, e.g. of the central processing unit [CPU]): 1 patents
- G06F9/30101 ({Special purpose registers}): 1 patents
- G06F9/3877 ({using a slave processor, e.g. coprocessor (peripheral processor): 1 patents
Companies
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List of Companies
- Intel Corporation: 6 patents
Collaborators
- Jiasheng Chen of El Dorado Hills CA (US) (6 collaborations)
- James Valerio of North Plains OR (US) (5 collaborations)
- Guei-Yuan Lueh of San Jose CA (US) (4 collaborations)
- Fangwen Fu of Folsom CA (US) (4 collaborations)
- Kevin Hurd of Flagler Beach FL (US) (3 collaborations)
- Jorge E. Parra Osorio of El Dorado Hills CA (US) (3 collaborations)
- Christopher Spencer of Chuluota FL (US) (3 collaborations)
- Pradeep K. Golconda of El Dorado Hills CA (US) (3 collaborations)
- Mukundan Swaminathan of San Ramon CA (US) (3 collaborations)
- Nicholas Murphy (3 collaborations)
- Shuai Mu of San Diego CA (US) (3 collaborations)
- Clifford Gibson (3 collaborations)
- Buqi Cheng of San Jose CA (US) (3 collaborations)
- Wei Xiong of Fremont CA (US) (2 collaborations)
- Hongzheng Li of Sunnyvale CA (US) (2 collaborations)
- Jorge Eduardo Parra Osorio of El Dorado Hills CA (US) (2 collaborations)
- Pradeep Golconda of El Dorado Hills CA (US) (2 collaborations)
- Takashi Nakagawa of Folsom CA (US) (1 collaborations)
- Li-An Tang of El Dorado Hills CA (US) (1 collaborations)
- Kaiyu Chen of San Jose CA (US) (1 collaborations)
- Vasanth Ranganathan of El Dorado Hills CA (US) (1 collaborations)
- Brent Schwartz of Sacramento CA (US) (1 collaborations)
- Sabareesh Ganapathy (1 collaborations)
- Peter Caday of Beaverton OR (US) (1 collaborations)
- Wei-Yu Chen of San Jose CA (US) (1 collaborations)
- Po-Yu Chen of San Diego CA (US) (1 collaborations)
- Timothy Bauer of Hillsboro OR (US) (1 collaborations)
- Maxim Kazakov of San Diego CA (US) (1 collaborations)
- Stanley Gambarin of Belmont CA (US) (1 collaborations)
- Samir Pandya of Folsom CA (US) (1 collaborations)
- Srilakshmi Jammula of Rancho Cordova CA (US) (1 collaborations)
Subcategories
This category has the following 4 subcategories, out of 4 total.
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Pages in category "Supratim Pal of Folsom CA (US)"
The following 15 pages are in this category, out of 15 total.
1
- 17957486. DETERMINISTIC BROADCASTING FROM SHARED MEMORY simplified abstract (Intel Corporation)
- 17958213. SYNCHRONIZATION UTILIZING LOCAL TEAM BARRIERS FOR THREAD TEAM PROCESSING simplified abstract (Intel Corporation)
- 17958216. SHARED LOCAL REGISTERS FOR THREAD TEAM PROCESSING simplified abstract (Intel Corporation)
- 18453861. INSTRUCTION ENCODING TO IMPLEMENT INCREASED REGISTER CAPACITY PER THREAD (Intel Corporation)
- 18453867. DISTRIBUTED REGISTER FILE CACHE TO REDUCE L1 BANDWIDTH REQUIREMENTS (Intel Corporation)
- 18462832. UNBLOCKING THE INTEGER PIPELINE DURING MATH PIPELINE PHASES IN A GRAPHICS ENVIRONMENT (Intel Corporation)
- 18621539. UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS simplified abstract (Intel Corporation)
I
- Intel corporation (20240103810). SUPPORTING VECTOR MULTIPLY ADD WITH DOUBLE ACCUMULATOR ACCESS IN A GRAPHICS ENVIRONMENT simplified abstract
- Intel corporation (20240111609). SYNCHRONIZATION UTILIZING LOCAL TEAM BARRIERS FOR THREAD TEAM PROCESSING simplified abstract
- Intel corporation (20240112295). SHARED LOCAL REGISTERS FOR THREAD TEAM PROCESSING simplified abstract
- Intel corporation (20240256274). SUPPORTING 8-BIT FLOATING POINT FORMAT OPERANDS IN A COMPUTING ARCHITECTURE simplified abstract
- Intel corporation (20240320000). UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS simplified abstract
- Intel corporation (20250068423). INSTRUCTION ENCODING TO IMPLEMENT INCREASED REGISTER CAPACITY PER THREAD
- Intel corporation (20250068473). DISTRIBUTED REGISTER FILE CACHE TO REDUCE L1 BANDWIDTH REQUIREMENTS
- Intel corporation (20250085969). UNBLOCKING THE INTEGER PIPELINE DURING MATH PIPELINE PHASES IN A GRAPHICS ENVIRONMENT
Categories:
- Jiasheng Chen of El Dorado Hills CA (US)
- James Valerio of North Plains OR (US)
- Guei-Yuan Lueh of San Jose CA (US)
- Fangwen Fu of Folsom CA (US)
- Kevin Hurd of Flagler Beach FL (US)
- Jorge E. Parra Osorio of El Dorado Hills CA (US)
- Christopher Spencer of Chuluota FL (US)
- Pradeep K. Golconda of El Dorado Hills CA (US)
- Mukundan Swaminathan of San Ramon CA (US)
- Nicholas Murphy
- Shuai Mu of San Diego CA (US)
- Clifford Gibson
- Buqi Cheng of San Jose CA (US)
- Wei Xiong of Fremont CA (US)
- Hongzheng Li of Sunnyvale CA (US)
- Jorge Eduardo Parra Osorio of El Dorado Hills CA (US)
- Pradeep Golconda of El Dorado Hills CA (US)
- Takashi Nakagawa of Folsom CA (US)
- Li-An Tang of El Dorado Hills CA (US)
- Kaiyu Chen of San Jose CA (US)
- Vasanth Ranganathan of El Dorado Hills CA (US)
- Brent Schwartz of Sacramento CA (US)
- Sabareesh Ganapathy
- Peter Caday of Beaverton OR (US)
- Wei-Yu Chen of San Jose CA (US)
- Po-Yu Chen of San Diego CA (US)
- Timothy Bauer of Hillsboro OR (US)
- Maxim Kazakov of San Diego CA (US)
- Stanley Gambarin of Belmont CA (US)
- Samir Pandya of Folsom CA (US)
- Srilakshmi Jammula of Rancho Cordova CA (US)
- Supratim Pal of Folsom CA (US)
- Inventors
- Inventors filing patents with Intel Corporation