20250218953. Methods Apparatus Em (Intel)
METHODS AND APPARATUS FOR EMBEDDING INTERCONNECT BRIDGES HAVING THROUGH SILICON VIAS IN SUBSTRATES
Abstract: example methods and apparatus for embedding interconnect bridges having through silicon vias in substrates are disclosed. an example semiconductor package a bridge die disposed in a recess of an underlying substrate, the bridge die including a via that electrically couples a first contact on a first side of the bridge die and a second contact on a second side of the bridge die, the recess extending to a first surface of the underlying substrate; a bond material to electrically and mechanically couple the first contact and an interconnect of the underlying substrate; and a fill material positioned between the first side of the bridge die and the first surface of the underlying substrate.
Inventor(s): Zhixin Xie, Gang Duan, Rahul Manepalli, Srinivas Pietambaram, Andrew Jimenez, Andrey Gunawan, Jung Kyu Han, Minglu Liu, Shriya Seshadri, Yekan Wang, Hong Seung Yeon, Seyyed Yahya Mousavi
CPC Classification: H01L23/5381 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({ takes precedence; manufacture or treatment } ; mountings per se ; {materials }))
Search for rejections for patent application number 20250218953
- Patent Applications
- Intel Corporation
- CPC H01L23/5381
- Zhixin Xie of Chandler AZ US
- Gang Duan of Chandler AZ US
- Rahul Manepalli of Chandler AZ US
- Srinivas Pietambaram of Chandler AZ US
- Andrew Jimenez of Mesa AZ US
- Andrey Gunawan of Scottsdale AZ US
- Jung Kyu Han of Chandler AZ US
- Minglu Liu of Chandler AZ US
- Shriya Seshadri of Chandler AZ US
- Yekan Wang of Chandler AZ US
- Hong Seung Yeon of Chandler AZ US
- Seyyed Yahya Mousavi of Chandler AZ US