Jump to content

Intel corporation (20250006841). TECHNOLOGIES FOR BARRIER LAYERS IN PEROVSKITE TRANSISTORS

From WikiPatents

TECHNOLOGIES FOR BARRIER LAYERS IN PEROVSKITE TRANSISTORS

Organization Name

intel corporation

Inventor(s)

Arnab Sen Gupta of Hillsboro OR US

Dmitri Evgenievich Nikonov of Beaverton OR US

John J. Plombon of Portland OR US

Rachel A. Steinhardt of Beaverton OR US

Punyashloka Debashis of Hillsboro OR US

Kevin P. O'brien of Portland OR US

Matthew V. Metz of Portland OR US

Scott B. Clendenning of Portland OR US

Brandon Holybee of Portland OR US

Marko Radosavljevic of Portland OR US

Ian Alexander Young of Olympia WA US

I-Cheng Tung of Hillsboro OR US

Sudarat Lee of Hillsboro OR US

Raseong Kim of Portland OR US

Pratyush P. Buragohain of Hillsboro OR US

TECHNOLOGIES FOR BARRIER LAYERS IN PEROVSKITE TRANSISTORS

This abstract first appeared for US patent application 20250006841 titled 'TECHNOLOGIES FOR BARRIER LAYERS IN PEROVSKITE TRANSISTORS

Original Abstract Submitted

technologies for a field effect transistor (fet) with a ferroelectric gate dielectric are disclosed. in an illustrative embodiment, a transistor includes a gate of strontium ruthenate and a ferroelectric gate dielectric layer of barium titanate. in order to prevent migration of ruthenium from the strontium ruthenate to the barium titanate, a barrier layer is placed between the gate and the ferroelectric gate dielectric layer. the barrier layer may be a metal oxide, such as strontium oxide, barium oxide, zirconium oxide, etc.

Cookies help us deliver our services. By using our services, you agree to our use of cookies.