Jump to content

20250219002. Electrolytic Indium-palladiu (Intel)

From WikiPatents

ELECTROLYTIC INDIUM-PALLADIUM-GOLD AS A SURFACE FINISH FOR EMBEDDED DIE ATTACHMENTS

Abstract: in embodiments herein, a surface finish (sf) is formed on conductive contacts of a package substrate for connection to an embedded interconnect bridge circuitry die. in some embodiments, the sf may be electroless nickel-electroless palladium-immersion gold (enepig). in other embodiments, the sf may be immersion gold-electroless palladium-immersion gold (igepig). in other embodiments, the sf may include a layer of electrolytic palladium-gold on a layer of indium or on a layer of cobalt-iron.

Inventor(s): Shruti Sharma, Prithwish Chatterjee, Numair Ahmed, Yuxin Fang, Siddharth Alur Narasimha Krishna, Wei-Lun Jen, Mollie A. Stewart, Ali Lehaf, Steve S. Cho, Sang Ha Yoo, David A. Woodley, Srinivas Venkata Ramanuja Pietambaram

CPC Classification: H01L24/20 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (use of semiconductor devices for measuring ; resistors in general ; magnets, inductors or transformers ; capacitors in general ; electrolytic devices ; batteries or accumulators ; waveguides, resonators or lines of the waveguide type ; line connectors or current collectors ; stimulated-emission devices ; electromechanical resonators ; loudspeakers, microphones, gramophone pick-ups or like acoustic electromechanical transducers ; electric light sources in general ; printed circuits, hybrid circuits, casings or constructional details of electrical apparatus, manufacture of assemblages of electrical components ; use of semiconductor devices in circuits having a particular application, see the subclass for the application))

Search for rejections for patent application number 20250219002


Cookies help us deliver our services. By using our services, you agree to our use of cookies.