18467859. MITIGATING PROXIMITY EFFECTS OF DEEP TRENCH VIAS (Intel Corporation)
MITIGATING PROXIMITY EFFECTS OF DEEP TRENCH VIAS
Organization Name
Inventor(s)
Avijit Barik of Portland OR US
Tofizur Rahman of Portland OR US
Conor P. Puls of Portland OR US
Ariana E. Bondoc of Hillsboro OR US
Diane Lancaster of Hillsboro OR US
Chi-Hing Choi of Portland OR US
Derek Keefer of Hillsboro OR US
MITIGATING PROXIMITY EFFECTS OF DEEP TRENCH VIAS
This abstract first appeared for US patent application 18467859 titled 'MITIGATING PROXIMITY EFFECTS OF DEEP TRENCH VIAS
Original Abstract Submitted
Disclosed herein are IC structures and devices that aim to mitigate proximity effects of deep trench vias. An example IC structure may include a device region having a first face and a second face, the second face being opposite the first face, and further include a conductive via extending between the first face and the second face, wherein the conductive via includes an electrically conductive material, and wherein a concentration of titanium at sidewalls of the conductive via is below about 10atoms per cubic centimeter.
- Intel Corporation
- Avijit Barik of Portland OR US
- Tao Chu of Portland OR US
- Minwoo Jang of Portland OR US
- Tofizur Rahman of Portland OR US
- Conor P. Puls of Portland OR US
- Ariana E. Bondoc of Hillsboro OR US
- Diane Lancaster of Hillsboro OR US
- Chi-Hing Choi of Portland OR US
- Derek Keefer of Hillsboro OR US
- H01L29/45
- H01L21/285
- H01L23/522
- H01L23/532
- H01L29/06
- H01L29/40
- H01L29/423
- H01L29/775
- H01L29/786
- CPC H10D62/83