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Category:H03L7/091
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Pages in category "H03L7/091"
The following 10 pages are in this category, out of 10 total.
1
- 17456207. DISTORTION REDUCTION CIRCUIT simplified abstract (International Business Machines Corporation)
- 17835292. Partial-Fractional Phase-locked Loop with Sigma Delta Modulator and Finite Impulse Response Filter simplified abstract (APPLE INC.)
- 17865811. SUB-SAMPLING PHASE LOCKED LOOP WITH COMPENSATED LOOP BANDWIDTH AND INTEGRATED CIRCUIT INCLUDING THE SAME simplified abstract (Samsung Electronics Co., Ltd.)
- 17895393. METHOD AND SYSTEM FOR LOW NOISE SUB-SAMPLING PHASE LOCK LOOP (PLL) ARCHITECTURE WITH AUTOMATIC DYNAMIC FREQUENCY ACQUISITION simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
- 18142939. PHASE-LOCKED LOOP DEVICE AND OPERATION METHOD THEREOF simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
- 18308754. CLOCK DATA RECOVERY CIRCUITS AND ELECTRONIC SYSTEMS THAT SUPPORT DATA-BASED CLOCK RECOVERY simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
- 18447221. Partial-Fractional Phase-locked Loop with Sigma Delta Modulator and Finite Impulse Response Filter simplified abstract (APPLE INC.)