17456207. DISTORTION REDUCTION CIRCUIT simplified abstract (International Business Machines Corporation)

DISTORTION REDUCTION CIRCUIT

Organization Name

International Business Machines Corporation

Inventor(s)

Jarrett Betke of Hoffman Estates IL (US)

George Russell Zettles, Iv of Rochester MN (US)

Timothy Lindquist of Rochester MN (US)

George Paulik of Rochester MN (US)

Timothy Clyde Buchholtz of Rochester MN (US)

Karl Erickson of Rochester MN (US)

Daniel Ramirez of Rochester MN (US)

DISTORTION REDUCTION CIRCUIT - A simplified explanation of the abstract

This abstract first appeared for US patent application 17456207 titled 'DISTORTION REDUCTION CIRCUIT

Simplified Explanation

The patent application describes an apparatus that includes a sampling circuit, a sense circuit, and a tuning circuit. The purpose of this apparatus is to reduce distortion in a sampled signal caused by a sampling clock signal. Here is a simplified explanation of the patent application:

• The sampling circuit samples an input signal using a sampling clock signal to produce a sampled signal.
• The sense circuit analyzes the sampled signal and identifies any distortion caused by the sampling clock signal.
• Based on the distortion, the sense circuit determines a scaling factor that represents the extent of the distortion.
• The tuning circuit then generates an offset signal by combining the sampling clock signal and the scaling factor.
• This offset signal is applied to the sampled signal to reduce the distortion caused by the sampling clock signal.

Potential applications of this technology:

• This apparatus can be used in various electronic devices that involve signal sampling, such as audio and video processing systems, communication systems, and data acquisition systems.
• It can be particularly useful in high-speed data transmission systems where accurate sampling is crucial to maintain signal integrity.

Problems solved by this technology:

• Sampling clock signals can introduce distortion in the sampled signal, leading to inaccuracies and loss of signal quality.
• This apparatus addresses this problem by analyzing the distortion and generating an offset signal to minimize its impact on the sampled signal.

Benefits of this technology:

• By reducing distortion caused by the sampling clock signal, this apparatus improves the accuracy and quality of the sampled signal.
• It allows for more precise and reliable signal processing, leading to improved performance in various applications.
• The apparatus can be easily integrated into existing systems and can be adjusted to different sampling rates and signal characteristics.

Original Abstract Submitted

An apparatus includes a sampling circuit, a sense circuit, and a tuning circuit. The sampling circuit samples an input signal according to a sampling clock signal to produce a sampled signal. The sense circuit determines a scaling factor based on a distortion in the sampled signal caused by the sampling clock signal. The tuning circuit generates an offset signal based on the sampling clock signal and the scaling factor. The offset signal reduces the distortion in the sampled signal caused by the sampling clock signal.