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Category:Florian Gstrein of Portland OR (US)
Pages in category "Florian Gstrein of Portland OR (US)"
The following 12 pages are in this category, out of 12 total.
1
- 17957552. BACKSIDE WAFER TREATMENTS TO REDUCE DISTORTIONS AND OVERLAY ERRORS DURING WAFER CHUCKING simplified abstract (Intel Corporation)
- 18064352. INTEGRATED CIRCUIT (IC) DEVICE WITH MULTI-PITCH PATTERN FABRICATED THROUGH CROSS-LINKABLE BLOCK COPOLYMER simplified abstract (Intel Corporation)
- 18064362. MULTI-PITCH PATTERNING THROUGH ONE-STEP FLOW simplified abstract (Intel Corporation)
- 18147107. PATTERNING BASED ON IN-SITU FORMATION OF BLOCK COPOYLMER THROUGH DEPROTECTION simplified abstract (Intel Corporation)
- 18516595. SELF-ALIGNED GATE ENDCAP (SAGE) ARCHITECTURES WITHOUT FIN END GAP simplified abstract (Intel Corporation)
I
- Intel corporation (20240113039). BACKSIDE WAFER TREATMENTS TO REDUCE DISTORTIONS AND OVERLAY ERRORS DURING WAFER CHUCKING simplified abstract
- Intel corporation (20240194483). INTEGRATED CIRCUIT (IC) DEVICE WITH MULTI-PITCH PATTERN FABRICATED THROUGH CROSS-LINKABLE BLOCK COPOLYMER simplified abstract
- Intel corporation (20240194672). MULTI-PITCH PATTERNING THROUGH ONE-STEP FLOW simplified abstract
- Intel corporation (20240203868). SERIAL DIRECTED SELF-ASSEMBLY (DSA) PROCESSES FOR FORMING METAL LAYER WITH CUT simplified abstract
- Intel corporation (20240204083). DSA (DIRECTED SELF-ASSEMBLY) BASED SPACER AND LINER FOR SHORTING MARGIN OF VIA simplified abstract
- Intel corporation (20240222119). PATTERNING BASED ON IN-SITU FORMATION OF BLOCK COPOYLMER THROUGH DEPROTECTION simplified abstract
- Intel corporation (20240290651). SELF-ASSEMBLED GUIDED HOLE AND VIA PATTERNING OVER GRATING simplified abstract