TOKYO ELECTRON LIMITED Patent Application Trends in 2025
TOKYO ELECTRON LIMITED Patent Filing Activity
TOKYO ELECTRON LIMITED patent applications in 2025
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Top 10 Technology Areas
- C23C16/52 (Controlling or regulating the coating process {()
- Count: 19 patents
- Example: 20250034699. FILM-FORMING METHOD AND FILM-FORMING APPARATUS (Tokyo Electron Limited)
- H01J37/32449 (Gas-filled discharge tubes (heating by discharge)
- Count: 13 patents
- Example: 20250037977. APPARATUS AND METHOD FOR PLASMA PROCESSING (Tokyo Electron Limited)
- H01J37/32715 (Gas-filled discharge tubes (heating by discharge)
- Count: 13 patents
- Example: 20250037977. APPARATUS AND METHOD FOR PLASMA PROCESSING (Tokyo Electron Limited)
- H01L21/31116 ({by dry-etching})
- Count: 13 patents
- Example: 20250069852. METHOD FOR PLASMA PROCESSING (Tokyo Electron Limited)
- H01J37/3244 (Gas-filled discharge tubes (heating by discharge)
- Count: 12 patents
- Example: 20250006461. Plasma Processing Apparatus (Tokyo Electron Limited)
- H01J2237/334 (ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps)
- Count: 11 patents
- Example: 20250069862. SUBSTRATE SUPPORT AND SUBSTRATE PROCESSING APPARATUS (Tokyo Electron Limited)
- H01J37/32146 (Gas-filled discharge tubes (heating by discharge)
- Count: 10 patents
- Example: 20250069851. PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD (Tokyo Electron Limited)
- H01L21/67253 (Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components {; Apparatus not specifically provided for elsewhere (processes per se)
- C23C16/45544 (COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion)
- Count: 8 patents
- Example: 20250034711. SUBSTRATE PROCESSING APPARATUS AND METHOD OF DISPOSING SUBSTRATE (Tokyo Electron Limited)
- H01J2237/332 (ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps)
- Count: 8 patents
- Example: 20250037981. SYSTEMS AND METHODS FOR DEPOSITING METAL (Tokyo Electron Limited)
Emerging Technology Areas
- G03F7/0042 ({with inorganic or organometallic light-sensitive compounds not otherwise provided for, e.g. inorganic resists ()
- G03F7/70533 (PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices)
- H01L23/53252 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS)
- Count: 1 patents
- Example: 20250105059. METHOD OF VIA FILLING (Tokyo Electron Limited)
- H01L21/76862 ({Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation})
- Count: 1 patents
- Example: 20250105059. METHOD OF VIA FILLING (Tokyo Electron Limited)
- H01L21/76826 ({by contacting the layer with gases, liquids or plasmas})
- Count: 1 patents
- Example: 20250105059. METHOD OF VIA FILLING (Tokyo Electron Limited)
- H01L21/76816 ({Aspects relating to the layout of the pattern or to the size of vias or trenches (layout of the interconnections per se)
- Count: 1 patents
- Example: 20250105059. METHOD OF VIA FILLING (Tokyo Electron Limited)
- H01L21/67023 (Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components {; Apparatus not specifically provided for elsewhere (processes per se)
- H01L21/0273 ({characterised by the treatment of photoresist layers})
- H01J37/32192 (Gas-filled discharge tubes (heating by discharge)
- Count: 1 patents
- Example: 20250105002. METHOD FOR SEMICONDUCTOR PROCESSING (Tokyo Electron Limited)
- H01L21/28562 (from a gas or vapour, e.g. condensation)
- Count: 1 patents
- Example: 20250105002. METHOD FOR SEMICONDUCTOR PROCESSING (Tokyo Electron Limited)
Top Inventors
- Masatomo KITA (5 patents)
- Taro IKEDA (5 patents)
- Barton Lane of Austin TX (US) (4 patents)
- Chishio KOSHIMIZU (4 patents)
- Nobutaka SASAKI (4 patents)
- Gyeong min PARK (4 patents)
- H. Jim FULFORD of Marianna FL (US) (4 patents)
- Shuji AZUMO (3 patents)
- Mark I. GARDNER of Austin TX (US) (3 patents)
- Henry Jim FULFORD of Marianna FL (US) (3 patents)
Patent Categories
Geographical Distribution of Inventors
Geographical Distribution of US Inventors
Categories:
- TOKYO ELECTRON LIMITED
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- CPC C23C16/401
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- CPC H01L21/02244
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- CPC H01J37/32458
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