Category:H. Jim FULFORD of Marianna FL (US)

H. Jim FULFORD of Marianna FL (US)

Executive Summary

H. Jim FULFORD of Marianna FL (US) is an inventor who has filed 4 patents. Their primary areas of innovation include No explanation available (2 patents), No explanation available (2 patents), Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate (1 patents), and they have worked with companies such as Tokyo Electron Limited (4 patents). Their most frequent collaborators include (3 collaborations), (1 collaborations), (1 collaborations).

Patent Filing Activity

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Technology Areas

List of Technology Areas

H10D62/122 (No explanation available): 2 patents
H10D84/83 (No explanation available): 2 patents
H01L23/49833 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
H01L21/4853 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
H01L21/486 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
H01L23/147 ({Semiconductor insulating substrates (semiconductor conductive substrates): 1 patents
H01L23/49866 ({characterised by the materials (materials of the substrates): 1 patents
H01L21/823885 ({with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface (with a current flow parallel to the substrate surface): 1 patents
H01L21/8221 ({Three dimensional integrated circuits stacked in different levels}): 1 patents
H01L21/823814 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
H01L21/823871 (to produce devices, e.g. integrated circuits, each consisting of a plurality of components): 1 patents
H01L27/092 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
H01L29/7827 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
H10D62/121 (No explanation available): 1 patents
H10D30/014 (No explanation available): 1 patents
H10D30/43 (No explanation available): 1 patents
H10D30/6735 (No explanation available): 1 patents
H10D30/6757 (No explanation available): 1 patents
H10D62/151 (No explanation available): 1 patents
H10D64/017 (No explanation available): 1 patents
H10D84/0167 (No explanation available): 1 patents
H10D84/017 (No explanation available): 1 patents
H10D84/0172 (No explanation available): 1 patents
H10D84/038 (No explanation available): 1 patents
H01L21/308 (using masks (): 1 patents
H01L21/31144 ({using masks}): 1 patents
H10D30/025 (No explanation available): 1 patents
H10D30/477 (No explanation available): 1 patents
H10D62/235 (No explanation available): 1 patents