Micron technology, inc. (20250104789). DUAL-READ DATA INTEGRITY SCAN IN A MEMORY SUB-SYSTEM
DUAL-READ DATA INTEGRITY SCAN IN A MEMORY SUB-SYSTEM
Organization Name
Inventor(s)
Zhongguang Xu of San Jose CA US
Hanping Chen of San Jose CA US
Zhenming Zhou of San Jose CA US
DUAL-READ DATA INTEGRITY SCAN IN A MEMORY SUB-SYSTEM
This abstract first appeared for US patent application 20250104789 titled 'DUAL-READ DATA INTEGRITY SCAN IN A MEMORY SUB-SYSTEM
Original Abstract Submitted
a processing device in a memory sub-system performs a first data integrity scan on a block of a memory device to determine a first combined reliability statistic of memory cells in the block associated with a first program level and a second program level, and performs, using a predetermined read level offset corresponding to one of the first program level or the second program level, a second data integrity scan on the block of the memory device to determine a second combined reliability statistic of the memory cells in the block associated with the first program level and the second program level. the processing device determines a difference between the first combined reliability statistic and the second combined reliability statistic and, responsive to the difference between the first combined reliability statistic and the second combined reliability statistic satisfying a threshold criterion, performs a corrective action on the block of the memory device.