Micron technology, inc. (20250068572). INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE
INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE
Organization Name
Inventor(s)
Bryan Hornung of Plano TX (US)
Tony M. Brewer of Plano TX (US)
Douglas Vanesko of Dallas TX (US)
Patrick Estep of Rowlett TX (US)
INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE
This abstract first appeared for US patent application 20250068572 titled 'INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE
Original Abstract Submitted
linear interpolation is performed within a memory system. the memory system receives a floating-point point index into an integer-indexed memory array. the memory system accesses the two values of the two adjacent integer indices, performs the linear interpolation, and provides the resulting interpolated value. in many system architectures, the critical limitation on system performance is the data transfer rate between memory and processing elements. accordingly, reducing the amount of data transferred improves overall system performance and reduces power consumption.
