Category:Tony M. Brewer of Plano TX (US)
Tony M. Brewer of Plano TX (US)
Executive Summary
Tony M. Brewer of Plano TX (US) is an inventor who has filed 8 patents. Their primary areas of innovation include {Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]} (2 patents), ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models (1 patents), RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES (1 patents), and they have worked with companies such as Micron Technology, Inc. (8 patents). Their most frequent collaborators include (2 collaborations), (2 collaborations), (2 collaborations).
Patent Filing Activity
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Technology Areas
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List of Technology Areas
- G06F3/0679 ({Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]}): 2 patents
- G06F13/1668 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G01S7/41 (RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES): 1 patents
- G01S13/9021 (RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES): 1 patents
- G01S13/933 (of aircraft or spacecraft): 1 patents
- G06F9/3001 ({Arithmetic instructions}): 1 patents
- G06F9/3887 ({controlled by a single instruction for multiple data lanes [SIMD]}): 1 patents
- G06N20/00 (Machine learning): 1 patents
- G06F3/0653 ({Monitoring storage devices or systems}): 1 patents
- G06F3/0607 ({by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device}): 1 patents
- G06F11/2056 ({by mirroring}): 1 patents
- G06F11/1658 ({Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit}): 1 patents
- G06F3/0659 ({Command handling arrangements, e.g. command buffers, queues, command scheduling}): 1 patents
- G06F3/0611 ({in relation to response time}): 1 patents
- G06F3/0658 ({Controller construction arrangements}): 1 patents
- G06F12/0802 (Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches): 1 patents
- G06F2212/60 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
- G06F9/526 (Program synchronisation; Mutual exclusion, e.g. by means of semaphores): 1 patents
- G06F9/5005 (Allocation of resources, e.g. of the central processing unit [CPU]): 1 patents
- G06F12/0238 ({Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory}): 1 patents
- G06F12/0833 (in hierarchically structured memory systems, e.g. virtual memory systems): 1 patents
- G06F12/0893 (Caches characterised by their organisation or structure): 1 patents
- G06F12/0891 (using clearing, invalidating or resetting means): 1 patents
- G06F9/3816 ({Instruction alignment, e.g. cache line crossing}): 1 patents
- G06F2212/7209 (ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models): 1 patents
Companies
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List of Companies
- Micron Technology, Inc.: 8 patents
Collaborators
- Bryan Hornung of Plano TX (US) (2 collaborations)
- Patrick Estep of Rowlett TX (US) (2 collaborations)
- Dean E. Walker of Allen TX (US) (2 collaborations)
- Douglas Vanesko of Dallas TX (US) (1 collaborations)
- Craig William Warner of Coppell TX (US) (1 collaborations)
Subcategories
This category has only the following subcategory.
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Pages in category "Tony M. Brewer of Plano TX (US)"
The following 32 pages are in this category, out of 32 total.
1
- 17823307. EVICTING A CACHE LINE WITH PENDING CONTROL REQUEST simplified abstract (Micron Technology, Inc.)
- 17823314. HOST-PREFERRED MEMORY OPERATION simplified abstract (Micron Technology, Inc.)
- 17823323. MEMORY SIDE CACHE REQUEST HANDLING simplified abstract (Micron Technology, Inc.)
- 17823391. MEMORY-SIDE CACHE DIRECTORY-BASED REQUEST QUEUE simplified abstract (Micron Technology, Inc.)
- 17823408. SILENT CACHE LINE EVICTION simplified abstract (Micron Technology, Inc.)
- 17823462. METHOD OF SUBMITTING WORK TO FABRIC ATTACHED MEMORY simplified abstract (Micron Technology, Inc.)
- 17823468. QUEUEING ASYNCHRONOUS EVENTS FOR ACCEPTANCE BY THREADS EXECUTING IN A BARREL PROCESSOR simplified abstract (Micron Technology, Inc.)
- 17823470. METHOD OF EFFICIENTLY IDENTIFYING ROLLBACK REQUESTS simplified abstract (Micron Technology, Inc.)
- 17898803. CONTROL PARAMETER ADDRESS VIRTUALIZATION simplified abstract (Micron Technology, Inc.)
- 17898929. ACCESS REQUEST REORDERING ACROSS A MULTIPLE-CHANNEL INTERFACE FOR MEMORY-BASED COMMUNICATION QUEUES simplified abstract (Micron Technology, Inc.)
- 17899016. ACCESS REQUEST REORDERING FOR MEMORY-BASED COMMUNICATION QUEUES simplified abstract (Micron Technology, Inc.)
- 17899171. RECALL PENDING CACHE LINE EVICTION simplified abstract (Micron Technology, Inc.)
- 17899184. VARIABLE EXECUTION TIME ATOMIC OPERATIONS simplified abstract (Micron Technology, Inc.)
- 17899197. SYNCHRONIZED REQUEST HANDLING AT A MEMORY DEVICE simplified abstract (Micron Technology, Inc.)
- 18386880. Multi-Threaded, Self-Scheduling Processor simplified abstract (Micron Technology, Inc.)
- 18388784. CONNECTIVITY IN COARSE GRAINED RECONFIGURABLE ARCHITECTURE simplified abstract (Micron Technology, Inc.)
- 18412846. System Having a Hybrid Threading Processor, a Hybrid Threading Fabric Having Configurable Computing Elements, and a Hybrid Interconnection Network simplified abstract (Micron Technology, Inc.)
- 18524942. EFFICIENT PROCESSING OF NESTED LOOPS FOR COMPUTING DEVICE WITH MULTIPLE CONFIGURABLE PROCESSING ELEMENTS USING MULTIPLE SPOKE COUNTS simplified abstract (Micron Technology, Inc.)
- 18591718. RECALL PENDING CACHE LINE EVICTION simplified abstract (Micron Technology, Inc.)
- 18596254. Power and Temperature Management for Functional Blocks Implemented by a 3D Stacked Integrated Circuit simplified abstract (Micron Technology, Inc.)
- 18606809. NEAR-MEMORY PSEUDORANDOM NUMBER GENERATION simplified abstract (Micron Technology, Inc.)
- 18618483. VARIABLE EXECUTION TIME ATOMIC OPERATIONS simplified abstract (Micron Technology, Inc.)
- 18815521. 3D STACKED INTEGRATED CIRCUITS HAVING FAILURE MANAGEMENT (Micron Technology, Inc.)
- 18887810. SILENT CACHE LINE EVICTION (Micron Technology, Inc.)
- 18887886. SYNCHRONIZED REQUEST HANDLING AT A MEMORY DEVICE (Micron Technology, Inc.)
- 18949354. INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE (Micron Technology, Inc.)
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- Micron technology, inc. (20240248846). RECALL PENDING CACHE LINE EVICTION simplified abstract
- Micron technology, inc. (20240311084). NEAR-MEMORY PSEUDORANDOM NUMBER GENERATION simplified abstract
- Micron technology, inc. (20240311306). VARIABLE EXECUTION TIME ATOMIC OPERATIONS simplified abstract
- Micron technology, inc. (20240421823). 3D STACKED INTEGRATED CIRCUITS HAVING FAILURE MANAGEMENT
- Micron technology, inc. (20250068572). INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE