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Intel corporation (20240256456). DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

From WikiPatents

DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

Organization Name

intel corporation

Inventor(s)

Vikranth Vemulapalli of FOLSOM CA US

Lakshminarayanan Striramassarma of Folsom CA US

Mike Macpherson of Portland OR US

Aravindh Anantaraman of Folsom CA US

Ben Ashbaugh of Folsom CA US

Murali Ramadoss of Folsom CA US

William B. Sadler of Folsom CA US

Jonathan Pearce of Portland OR US

Scott Janus of Loomis CA US

Brent Insko of Portland OR US

Vasanth Ranganathan of El Dorado Hills CA US

Kamal Sinha of Folsom CA US

Arthur Hunter, Jr. of Cameron Park CA US

Prasoonkumar Surti of Folsom CA US

Nicolas Galoppo Von Borries of Portland OR US

Joydeep Ray of Folsom CA US

Abhishek R. Appu of El Dorado Hills CA US

ElMoustapha Ould-ahmed-vall of Chandler AZ US

Altug Koker of El Dorado Hills CA US

Sungye Kim of Folsom CA US

Subramaniam Maiyuran of Gold River CA US

Valentin Andrei of San Jose CA US

DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

This abstract first appeared for US patent application 20240256456 titled 'DATA PREFETCHING FOR GRAPHICS DATA PROCESSING

Original Abstract Submitted

embodiments are generally directed to data prefetching for graphics data processing. an embodiment of an apparatus includes one or more processors including one or more graphics processing units (gpus); and a plurality of caches to provide storage for the one or more gpus, the plurality of caches including at least an l1 cache and an l3 cache, wherein the apparatus to provide intelligent prefetching of data by a prefetcher of a first gpu of the one or more gpus including measuring a hit rate for the li cache; upon determining that the hit rate for the l1 cache is equal to or greater than a threshold value, limiting a prefetch of data to storage in the l3 cache, and upon determining that the hit rate for the l1 cache is less than a threshold value, allowing the prefetch of data to the l1 cache.

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