Category:Stephen W. Russell of Boise ID (US)
Stephen W. Russell
Stephen W. Russell from Boise ID (US) has applied for patents in technology areas such as H01L27/02, H01L21/768, H01L27/04 with micron technology, inc..
Patents
Pages in category "Stephen W. Russell of Boise ID (US)"
The following 11 pages are in this category, out of 11 total.
1
- 18391122. SINGLE PLUG FLOW FOR A MEMORY DEVICE simplified abstract (Micron Technology, Inc.)
- 18417830. THIN FILM TRANSISTORS AND RELATED FABRICATION TECHNIQUES simplified abstract (Micron Technology, Inc.)
- 18593671. TRENCH AND MULTIPLE PIER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS simplified abstract (Micron Technology, Inc.)
- 18594397. Methods of Forming Conductive Pipes Between Neighboring Features, and Integrated Assemblies Having Conductive Pipes Between Neighboring Features simplified abstract (Micron Technology, Inc.)
- 18826246. BURIED LINES AND RELATED FABRICATION TECHNIQUES (Micron Technology, Inc.)
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- Micron technology, inc. (20240185892). MEMORY ARRAY DECODING AND INTERCONNECTS simplified abstract
- Micron technology, inc. (20240237364). THIN FILM TRANSISTORS AND RELATED FABRICATION TECHNIQUES simplified abstract
- Micron technology, inc. (20240250132). Methods of Forming Conductive Pipes Between Neighboring Features, and Integrated Assemblies Having Conductive Pipes Between Neighboring Features simplified abstract
- Micron technology, inc. (20240292632). CROSS-POINT MEMORY ARRAY WITH ACCESS LINES simplified abstract
- Micron technology, inc. (20240312521). TRENCH AND MULTIPLE PIER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS simplified abstract
- Micron technology, inc. (20250072118). BURIED LINES AND RELATED FABRICATION TECHNIQUES