18826246. BURIED LINES AND RELATED FABRICATION TECHNIQUES (Micron Technology, Inc.)
BURIED LINES AND RELATED FABRICATION TECHNIQUES
Organization Name
Inventor(s)
Hernan Castro of Shingle Springs CA (US)
Stephen W. Russell of Boise ID (US)
Stephen H. Tang of Fremont CA (US)
BURIED LINES AND RELATED FABRICATION TECHNIQUES
This abstract first appeared for US patent application 18826246 titled 'BURIED LINES AND RELATED FABRICATION TECHNIQUES
Original Abstract Submitted
Methods, systems, and devices for buried lines and related fabrication techniques are described. An electronic device (e.g., an integrated circuit) may include multiple buried lines at multiple layers of a stack. For example, a first layer of the stack may include multiple buried lines formed based on a pattern of vias formed at an upper layer of the stack. The pattern of vias may be formed in a wide variety of spatial configurations, and may allow for conductive material to be deposited at a buried target layer. In some cases, buried lines may be formed at multiple layers of the stack concurrently.