Category:Shin-Puu Jeng

Shin-Puu Jeng

Executive Summary

Shin-Puu Jeng is an inventor who has filed 19 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (12 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (12 patents), SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (12 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (10 patents), Taiwan Semiconductor Manufacturing Company Limited (9 patents). Their most frequent collaborators include (8 collaborations), (7 collaborations), (6 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

• H01L24/16 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 12 patents
• H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 12 patents
• H01L2224/32225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 12 patents
• H01L2224/73204 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 12 patents
• H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 11 patents
• H01L2224/16227 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 10 patents
• H01L25/50 ({Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group): 9 patents
• H01L23/49822 ({Multilayer substrates (multilayer metallisation on monolayer substrate): 8 patents
• H01L25/0655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 8 patents
• H01L23/3128 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 6 patents
• H01L25/105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 5 patents
• H01L23/562 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L21/565 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L2224/80896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L23/3135 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L21/563 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 4 patents
• H01L21/56 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
• H01L23/5383 ({Multilayer substrates (): 3 patents
• H01L23/3107 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L24/83 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2224/16238 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2224/32245 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2224/73253 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L2224/80895 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L25/18 (the devices being of types provided for in two or more different subgroups of the same main group of groups): 3 patents
• H01L2224/92125 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L23/3192 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 3 patents
• H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 3 patents
• H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 2 patents
• H01L23/5386 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 2 patents
• H10B80/00 (Assemblies of multiple devices comprising at least one memory device covered by this subclass): 2 patents
• H01L24/05 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/13 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/0401 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2924/16235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2924/16251 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/16 (Fillings or auxiliary members in containers {or encapsulations}, e.g. centering rings (): 2 patents
• H01L21/568 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/5389 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 2 patents
• H01L24/19 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/20 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/81 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/92 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/81005 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/83005 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/3185 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2224/16235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/5381 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 2 patents
• H01L25/0652 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2225/1023 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2225/1041 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2225/1058 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L23/3157 ({Partial encapsulation or coating (mask layer used as insulation layer): 2 patents
• H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L24/96 ({the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting}): 2 patents
• H01L25/0657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L2924/181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
• H01L21/4853 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 2 patents
• H01L21/4857 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H01L23/5385 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
• H01L23/49833 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
• H01L2224/10126 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/08238 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/83203 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/16151 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/1616 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/50 (Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups): 1 patents
• H01L23/367 (Cooling facilitated by shape of device {(): 1 patents
• H01L23/295 ({containing a filler (): 1 patents
• H01L23/3121 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/29 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/95 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/3675 (Cooling facilitated by shape of device {(): 1 patents
• H01L24/30 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/33 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13124 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13139 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13144 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13147 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/13155 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/19 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/214 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/215 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/221 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/224 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29109 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29111 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29116 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29193 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/2929 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/29386 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/30505 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/3303 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/33181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/33183 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/81815 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/83102 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/83855 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/92225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/95001 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/1035 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/1094 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/01006 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/01013 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/01028 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/01029 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/01046 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/01047 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/0105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/01079 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/014 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/0503 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/05432 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/05442 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/0635 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/0665 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/07025 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/78 (with subsequent division of the substrate into plural individual devices (cutting to change the surface-physical characteristics or shape of semiconductor bodies): 1 patents
• H10D1/68 (No explanation available): 1 patents
• H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/15174 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/293 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/05647 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/32221 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/80201 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/80357 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/80447 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/6835 ({using temporarily an auxiliary support}): 1 patents
• H01L24/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/96 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/97 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/3511 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/49811 ({Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads (): 1 patents
• H01L2224/16225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2225/06541 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/3114 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/486 (Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups): 1 patents
• H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents
• H01L23/5384 ({Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors (): 1 patents
• H01L24/03 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/82 ({by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI] (interconnection structure between a plurality of semiconductor chips): 1 patents
• H01L2221/68318 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2221/68345 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2221/68381 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/15311 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2924/15331 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/561 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L21/3043 ({Making grooves, e.g. cutting}): 1 patents
• H01L23/04 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L24/14 ({of a plurality of bump connectors}): 1 patents
• H01L23/31 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L23/40 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/12105 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
• H01L2224/16145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

List of Companies

• Taiwan Semiconductor Manufacturing Company, Ltd.: 10 patents
• Taiwan Semiconductor Manufacturing Company Limited: 9 patents

Collaborators

• Chin-Hua Wang (8 collaborations)
• Meng-Liang Lin (7 collaborations)
• Tsung-Yen Lee (6 collaborations)
• Hsien-Wei Chen (6 collaborations)
• Ming-Chih Yew (4 collaborations)
• Ying-Ju Chen (4 collaborations)
• Po-Yao Lin (3 collaborations)
• Shuo-Mao Chen (2 collaborations)
• Chia-Kuei Hsu (2 collaborations)
• Cong-Wei Yang (2 collaborations)
• Yu Chen Lee (2 collaborations)
• Yu-Sheng Lin (2 collaborations)
• Shu-Shen Yeh (2 collaborations)
• Chun-Wei Chen (2 collaborations)
• Po-Yao Chuang (2 collaborations)
• Monsen Liu (1 collaborations)
• Hsin-Yu Chen (1 collaborations)
• Chia-Hsiang Lin (1 collaborations)
• Chien-Hung Chen (1 collaborations)
• Fu Fan (1 collaborations)
• Hsien-Wen Liu (1 collaborations)
• Shih-Ting Hung (1 collaborations)
• Yi-Jou Lin (1 collaborations)
• Tzu-Jui Fang (1 collaborations)
• Te-Chi Wong (1 collaborations)