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Category:Dian-Hau Chen

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Dian-Hau Chen

Executive Summary

Dian-Hau Chen is an inventor who has filed 9 patents. Their primary areas of innovation include SEMICONDUCTOR DEVICES NOT COVERED BY CLASS (4 patents), Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor} (4 patents), {Thin films associated with contacts of capacitors} (3 patents), and they have worked with companies such as Taiwan Semiconductor Manufacturing Company, Ltd. (9 patents). Their most frequent collaborators include (5 collaborations), (5 collaborations), (3 collaborations).

Patent Filing Activity

Technology Areas

List of Technology Areas

  • H01L23/5226 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 4 patents
  • H01L23/481 (Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements {; Selection of materials therefor}): 4 patents
  • H01L21/76877 ({Thin films associated with contacts of capacitors}): 3 patents
  • H01L24/08 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L2924/01022 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 2 patents
  • H01L23/5223 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/76805 ({the opening being a via or contact hole penetrating the underlying conductor}): 1 patents
  • H10D1/692 (No explanation available): 1 patents
  • H01L23/5283 ({Geometry or} layout of the interconnection structure {(): 1 patents
  • H01L23/528 ({Geometry or} layout of the interconnection structure {(): 1 patents
  • H01L21/768 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
  • H01L23/585 ({comprising conductive layers or plates or strips or rods or rings (): 1 patents
  • H01L22/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/02 ({Bonding areas (on insulating substrates, e.g. chip carriers,): 1 patents
  • H01L24/05 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L22/14 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/80 ({Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected}): 1 patents
  • H01L2224/02321 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/0235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/0239 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05018 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05024 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05027 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05083 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05546 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05558 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05569 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05571 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05573 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05624 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05647 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05655 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05657 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/05666 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08145 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08225 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80011 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80895 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/80896 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/01013 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/01027 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/01028 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/01029 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/76802 (Applying interconnections to be used for carrying current between separate components within a device {comprising conductors and dielectrics}): 1 patents
  • H01L21/76843 ({formed in openings in a dielectric}): 1 patents
  • H01L24/03 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/11 ({Manufacturing methods (for bumps on insulating substrates): 1 patents
  • H10D30/014 (No explanation available): 1 patents
  • H10D30/43 (No explanation available): 1 patents
  • H10D30/6735 (No explanation available): 1 patents
  • H10D30/6757 (No explanation available): 1 patents
  • H10D62/121 (No explanation available): 1 patents
  • H10D64/01 (No explanation available): 1 patents
  • H10D64/254 (No explanation available): 1 patents
  • H10D84/83 (No explanation available): 1 patents
  • H01L2224/03 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/11 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L23/564 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H10N50/01 (No explanation available): 1 patents
  • H10B61/22 (ELECTRONIC MEMORY DEVICES): 1 patents
  • H10N50/80 (No explanation available): 1 patents
  • H10D1/68 (No explanation available): 1 patents
  • H01L21/02178 ({the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz (): 1 patents
  • H01L21/02181 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/02186 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/02189 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/02194 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L21/28556 (from a gas or vapour, e.g. condensation): 1 patents
  • H01L21/32133 ({by chemical means only}): 1 patents
  • H01L23/5389 (the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates ({): 1 patents
  • H01L23/49838 (Leads, {i.e. metallisations or lead-frames} on insulating substrates, {e.g. chip carriers (shape of the substrate): 1 patents
  • H01L23/562 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/32 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L24/73 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/0801 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/08056 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/32054 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2224/32235 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents
  • H01L2924/01073 (SEMICONDUCTOR DEVICES NOT COVERED BY CLASS): 1 patents

Companies

List of Companies

  • Taiwan Semiconductor Manufacturing Company, Ltd.: 9 patents

Collaborators

Subcategories

This category has the following 5 subcategories, out of 5 total.

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