Category:Chiao-Ti Huang of Portland OR (US)
Chiao-Ti Huang
Chiao-Ti Huang from Portland OR (US) has applied for patents in technology areas such as H01L21/762, H01L21/768, H01L23/48 with intel corporation.
Patents
Subcategories
This category has the following 2 subcategories, out of 2 total.
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Pages in category "Chiao-Ti Huang of Portland OR (US)"
The following 22 pages are in this category, out of 22 total.
1
- 18072559. INTEGRATED CIRCUIT STRUCTURES WITH SOURCE OR DRAIN CONTACTS HAVING ENHANCED CONTACT AREA simplified abstract (Intel Corporation)
- 18072569. INTEGRATED CIRCUIT STRUCTURE WITH RECESSED TRENCH CONTACT AND DEEP BOUNDARY VIA simplified abstract (Intel Corporation)
- 18181598. FABRICATION OF NANORIBBON-BASED TRANSISTORS USING PATTERNED FOUNDATION simplified abstract (Intel Corporation)
- 18187782. INTEGRATED CIRCUIT DEVICE WITH PERFORMANCE-ENHANCING LAYOUT simplified abstract (Intel Corporation)
- 18187801. INTEGRATED CIRCUIT DEVICE WITH REDUCED N-P BOUNDARY EFFECT simplified abstract (Intel Corporation)
- 18187990. LONG CHANNEL FIN TRANSISTORS IN NANORIBBON-BASED DEVICES simplified abstract (Intel Corporation)
- 18214898. INTEGRATED CIRCUIT STRUCTURES WITH DIFFERENTIAL EPITAXIAL SOURCE OR DRAIN DENT (Intel Corporation)
- 18216493. PERFORMANCE OPTIMIZATION OF TRANSISTORS SHARING CHANNEL STRUCTURES OF VARYING WIDTH (Intel Corporation)
- 18463436. LATERAL ETCHING PROCESS TO REMOVE METAL GATE FOOT STRUCTURES (Intel Corporation)
- 18466246. THROUGH-GATE STRUCTURE WITH AN AIRGAP SPACER IN A SEMICONDUCTOR DEVICE (Intel Corporation)
I
- Intel corporation (20240178101). INTEGRATED CIRCUIT STRUCTURE WITH RECESSED TRENCH CONTACT AND DEEP BOUNDARY VIA simplified abstract
- Intel corporation (20240178273). INTEGRATED CIRCUIT STRUCTURES WITH SOURCE OR DRAIN CONTACTS HAVING ENHANCED CONTACT AREA simplified abstract
- Intel corporation (20240290788). METAL GATE FABRICATION FOR NANORIBBON-BASED TRANSISTORS simplified abstract
- Intel corporation (20240290835). NANORIBBON-BASED TRANSISTORS WITH ETCH STOP LAYER TO ASSIST SUBFIN REMOVAL simplified abstract
- Intel corporation (20240304621). FABRICATION OF NANORIBBON-BASED TRANSISTORS USING PATTERNED FOUNDATION simplified abstract
- Intel corporation (20240321859). INTEGRATED CIRCUIT DEVICE WITH PERFORMANCE-ENHANCING LAYOUT simplified abstract
- Intel corporation (20240321887). INTEGRATED CIRCUIT DEVICE WITH REDUCED N-P BOUNDARY EFFECT simplified abstract
- Intel corporation (20240321987). LONG CHANNEL FIN TRANSISTORS IN NANORIBBON-BASED DEVICES simplified abstract
- Intel corporation (20240332088). MODULATION OF CHIP PERFORMANCE BY CONTROLLING TRANSISTOR GATE PROFILE simplified abstract
- Intel corporation (20240334669). BURIED LOW-K DIELECTRIC TO PROTECT SOURCE/DRAIN TO GATE CONNECTION simplified abstract
- Intel corporation (20250087530). LATERAL ETCHING PROCESS TO REMOVE METAL GATE FOOT STRUCTURES
- Intel corporation (20250089310). THROUGH-GATE STRUCTURE WITH AN AIRGAP SPACER IN A SEMICONDUCTOR DEVICE