Category:Abhishek A. Sharma of Portland OR US
Abhishek A. Sharma
Abhishek A. Sharma from Portland OR US has applied for patents in technology areas such as G11C5/06, G11C11/4091, G11C11/419 with intel corporation.
Patents
Pages in category "Abhishek A. Sharma of Portland OR US"
The following 16 pages are in this category, out of 16 total.
1
- 18402595. CAPACITOR ARCHITECTURES IN SEMICONDUCTOR DEVICES (Intel Corporation)
- 18467947. CONNECTIONS OF BIT LINES AND WORD LINES IN STACKED MEMORY LAYERS TO A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR LAYER (Intel Corporation)
- 18471382. STACKED MEMROY LAYERS WITH GLOBAL BIT LINE OR GLOBAL WORD LINE (Intel Corporation)
- 18471402. STACKED MEMORY LAYERS WITH UNIFORM ACCESS (Intel Corporation)
- 18473387. INTEGRATED CIRCUIT STRUCTURES WITH VIAS CONNECTED TO BONDING PADS (Intel Corporation)
- 18473421. MEMORY LAYERS BONDED TO LOGIC LAYERS WITH INCLINATION (Intel Corporation)
- 18983471. MULTI-LAYERED OPTICAL INTEGRATED CIRCUIT ASSEMBLY WITH A MONOCRYSTALLINE WAVEGUIDE AND LOWER CRYSTALLINITY BONDING LAYER (Intel Corporation)
I
- Intel corporation (20250008723). THREE-DIMENSIONAL FLOATING BODY MEMORY
- Intel corporation (20250020873). HYBRID MANUFACTURING FOR INTEGRATING PHOTONIC AND ELECTRONIC COMPONENTS
- Intel corporation (20250095693). CONNECTIONS OF BIT LINES AND WORD LINES IN STACKED MEMORY LAYERS TO A COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR LAYER
- Intel corporation (20250104760). STACKED MEMROY LAYERS WITH GLOBAL BIT LINE OR GLOBAL WORD LINE
- Intel corporation (20250105139). INTEGRATED CIRCUIT STRUCTURES WITH VIAS CONNECTED TO BONDING PADS
- Intel corporation (20250107107). STACKED MEMORY LAYERS WITH UNIFORM ACCESS
- Intel corporation (20250107108). MEMORY LAYERS BONDED TO LOGIC LAYERS WITH INCLINATION
- Intel corporation (20250116812). MULTI-LAYERED OPTICAL INTEGRATED CIRCUIT ASSEMBLY WITH A MONOCRYSTALLINE WAVEGUIDE AND LOWER CRYSTALLINITY BONDING LAYER
- Intel corporation (20250120100). CAPACITOR ARCHITECTURES IN SEMICONDUCTOR DEVICES
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