Apple inc. (20250112154). Power, Signaling and Thermal Path Co-optimization
Power, Signaling and Thermal Path Co-optimization
Organization Name
Inventor(s)
Sanjay Dabral of Cupertino CA US
Antonietta Oliva of Sausalito CA US
Sambasivan Narayan of Saratoga CA US
Vidhya Ramachandran of Cupertino CA US
Power, Signaling and Thermal Path Co-optimization
This abstract first appeared for US patent application 20250112154 titled 'Power, Signaling and Thermal Path Co-optimization
Original Abstract Submitted
chip structures and electronic modules including a power delivery network (pdn) routing structure and signal routing structure to balance power, signaling, and thermal requirements are described. in an embodiment, the chip includes a device layer, a pdn routing structure on top of the device layer, and a signal routing structure underneath the device layer.