WRAP AROUND BACKSIDE SOURCE/DRAIN CONTACT

Abstract: embodiments of the present invention are directed to processing methods and resulting structures for providing wrap-around backside source/drain contacts through a wafer backside. in a non-limiting embodiment, a first field effect transistor and a second filed effect transistor are formed. the first field effect transistor includes a first source or drain (s/d) region, a second s/d region, and a backside contact. the backside contact includes a lower portion and a wrap-around portion wrapping around a lower portion of the second s/d region. the second field effect transistor includes a frontside contact on a s/d region and a backside sacrificial region below the s/d region.

Inventor(s): Anna Lin, Gopal Sankar Kenath, Tao Li, Ruilong Xie

CPC Classification: H10D64/254 (No explanation available)

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