18971871. SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE (Micron Technology, Inc.)
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE
Organization Name
Inventor(s)
Sean S. Eilert of Penryn CA US
Aliasger T. Zaidy of Seattle WA US
Kunal R. Parekh of Boise ID US
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE
This abstract first appeared for US patent application 18971871 titled 'SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE
Original Abstract Submitted
A memory device includes a memory die bonded to a logic die via a wafer-on-wafer bond. A controller of the memory device that is coupled to the memory die can activate a row of the memory die. Responsive to activating the row, a sense amplifier stripe of the memory die can latch a first plurality of signals. A transceiver can route a second plurality of signals from the sense amplifier stripe to the logic die.
Categories:
- Micron Technology, Inc.
- Sean S. Eilert of Penryn CA US
- Glen E. Hush of Boise ID US
- Aliasger T. Zaidy of Seattle WA US
- Kunal R. Parekh of Boise ID US
- G11C11/4093
- G06F3/06
- G06F13/16
- G06F13/28
- G11C7/08
- G11C7/10
- G11C11/408
- G11C11/4091
- G11C11/4096
- G16B30/00
- G16B50/10
- H01L21/66
- H01L21/78
- H01L23/00
- H01L25/00
- H01L25/065
- H01L25/18
- CPC G11C11/4093