SEMICONDUCTOR PACKAGE

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SEMICONDUCTOR PACKAGE

This abstract first appeared for US patent application 18775260 titled 'SEMICONDUCTOR PACKAGE

Original Abstract Submitted

An example semiconductor package includes a package substrate, an electronic integrated circuit (EIC) package mounted on the package substrate, and a plurality of photonic integrated circuit (PIC) chips stacked on the EIC package. Each PIC chip of the plurality of PIC chips includes an upper groove recessed inwards from an upper surface of the PIC chip and being open toward a first side surface of the PIC chip. The EIC package includes a lower redistribution layer on the package substrate, an EIC chip mounted on the lower redistribution layer, a molding layer surrounding the EIC chip, a through via passing through the molding layer in a vertical direction and electrically connected with the lower redistribution layer, and an upper redistribution layer on the through via.