NON-VOLATILE MEMORY WTH LOOP DEPENDANT RAMP-UP RATE

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Inventor(s)

NON-VOLATILE MEMORY WTH LOOP DEPENDANT RAMP-UP RATE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18357339 titled 'NON-VOLATILE MEMORY WTH LOOP DEPENDANT RAMP-UP RATE

The abstract describes a non-volatile memory system that programs memory cells by applying doses of programming and performing program-verify operations after each dose, referred to as a program loop. The program-verify operation involves applying a verify reference voltage to a selected word line and an overdrive voltage to unselected word lines. To reduce current usage, the system includes a reduction in the ramp-up rate of the overdrive voltage during program-verify.

Memory system programs cells by applying doses of programming and performing program-verify operations.
Program-verify operation includes applying verify reference voltage to selected word line and overdrive voltage to unselected word lines.
System reduces current usage by reducing ramp-up rate of overdrive voltage during program-verify.

- Potential Applications:**

This technology can be applied in various non-volatile memory devices such as flash memory, solid-state drives, and other storage systems.

- Problems Solved:**

This technology addresses the issue of high current usage during programming of non-volatile memory cells, leading to improved efficiency and reduced power consumption.

- Benefits:**

- Enhanced efficiency in programming non-volatile memory cells - Reduced power consumption - Improved performance of memory systems

- Commercial Applications:**

Title: "Efficient Non-Volatile Memory Programming System" This technology can be utilized in the development of more energy-efficient and high-performance non-volatile memory devices, catering to the growing demand for faster and more reliable storage solutions in various industries such as data storage, consumer electronics, and automotive.

- Questions about Non-Volatile Memory Programming System:**

1. How does the reduction in the ramp-up rate of the overdrive voltage contribute to reducing current usage during program-verify operations? 2. What are the potential implications of implementing this technology in solid-state drives for consumer electronics?

Original Abstract Submitted

A non-volatile memory system is configured to program non-volatile memory cells by applying doses of programming to the memory cells and performing a program-verify operation following each dose of programming. Each dose of programming and the corresponding program-verify operation following the dose of programming is referred to as a program loop. The program-verify operation comprises applying a verify reference voltage to a selected word line and applying an overdrive voltage to unselected word lines. To reduce the amount of current used, the memory system includes a loop dependent reduction in the ramp-up rate of the overdrive voltage applied to unselected word lines during program-verify.