18215748. INTEGRATED CIRCUIT STRUCTURES HAVING REDUCED END CAP (Intel Corporation)
INTEGRATED CIRCUIT STRUCTURES HAVING REDUCED END CAP
Organization Name
Inventor(s)
Leonard P. Guler of Hillsboro OR (US)
Shao Ming Koh of Tigard OR (US)
Sean Pursel of Hillsboro OR (US)
Charles H. Wallace of Portland OR (US)
Hongqian Sun of Sammamish WA (US)
INTEGRATED CIRCUIT STRUCTURES HAVING REDUCED END CAP
This abstract first appeared for US patent application 18215748 titled 'INTEGRATED CIRCUIT STRUCTURES HAVING REDUCED END CAP
Original Abstract Submitted
An integrated circuit structure includes a first vertical stack of horizontal nanowires or a first fin having a first lateral width. A first gate electrode is over the first vertical stack of horizontal nanowires or the first fin, the first gate electrode having a second lateral width. A second vertical stack of horizontal nanowires or a second fin is laterally spaced apart from the first vertical stack of horizontal nanowires or the second fin, the second vertical stack of horizontal nanowires or the second fin having a third lateral width, the third lateral width less than the first lateral width. A second gate electrode is over the second vertical stack of horizontal nanowires or the second fin, the second gate electrode laterally spaced apart from the first gate electrode, and the second gate electrode having a fourth lateral width, the fourth lateral width less than the second lateral width.