US Patent Application 18447125. SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF simplified abstract

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.==Inventor(s)==

[[Category:Shu-Uei Jang of Hsinchu City (TW)]]

[[Category:Shu-Yuan Ku of Zhubei City (TW)]]

[[Category:Shih-Yao Lin of New Taipei City (TW)]]

SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF - A simplified explanation of the abstract

This abstract first appeared for US patent application 18447125 titled 'SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF

Simplified Explanation

The patent application describes a method for forming a trench in a semiconductor structure using a combination of anisotropic and isotropic etching processes. The trench is formed by removing a portion of a dummy gate structure that straddles two semiconductor fins and a dielectric fin.

• The method involves forming a first and second semiconductor fin over a substrate, along with a dielectric fin between them.
• A dummy gate structure is then formed, extending in a different direction and spanning the two semiconductor fins and the dielectric fin.
• The etching process used to remove a portion of the dummy gate structure and form the trench consists of multiple stages.
• Each stage involves a combination of anisotropic etching, which removes material in a controlled manner, and isotropic etching, which removes material uniformly in all directions.
• This combination of etching processes ensures that the distance between the inner sidewalls of the trench remains consistent along the second direction.
• The variation in this distance is kept within a predetermined threshold, ensuring the desired trench dimensions are achieved.

Original Abstract Submitted

A method includes forming a first semiconductor fin and a second semiconductor fin over a substrate that both extend along a first direction. The method includes forming a dielectric fin extending along the first direction and is disposed between the first and second semiconductor fins. The method includes forming a dummy gate structure extending along a second direction and straddling the first and second semiconductor fins and the dielectric fin. The method includes removing a portion of the dummy gate structure over the dielectric fin to form a trench by performing an etching process that includes a plurality of stages. Each of the plurality of stages includes a combination of anisotropic etching and isotropic etching such that a variation of a distance between respective inner sidewalls of the trench along the second direction is within a threshold.