US Patent Application 18446521. Integrated Circuit Package and Method simplified abstract

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Integrated Circuit Package and Method

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor(s)

Ting-Chen Tseng of Hsinchu (TW)

Sih-Hao Liao of New Taipei City (TW)

Po-Han Wang of Hsinchu (TW)

Yu-Hsiang Hu of Hsinchu (TW)

Hung-Jui Kuo of Hsinchu (TW)

Integrated Circuit Package and Method - A simplified explanation of the abstract

This abstract first appeared for US patent application 18446521 titled 'Integrated Circuit Package and Method

Simplified Explanation

The patent application describes a method for fabricating a semiconductor device with multiple metallization patterns and dielectric layers.

  • The method begins by dispensing a first dielectric layer around and on a first metallization pattern, using a photoinsensitive molding compound.
  • The first dielectric layer is then planarized to create a smooth surface.
  • A second metallization pattern is formed on top of the first dielectric layer and the first metallization pattern.
  • A second dielectric layer is dispensed around the second metallization pattern and on the first dielectric layer, using a photosensitive molding compound.
  • The second dielectric layer is patterned to create openings that expose portions of the second metallization pattern.
  • A third metallization pattern is formed on top of the second dielectric layer and in the openings, connecting to the exposed portions of the second metallization pattern.


Original Abstract Submitted

In an embodiment, a method includes: dispensing a first dielectric layer around and on a first metallization pattern, the first dielectric layer including a photoinsensitive molding compound; planarizing the first dielectric layer such that surfaces of the first dielectric layer and the first metallization pattern are planar; forming a second metallization pattern on the first dielectric layer and the first metallization pattern; dispensing a second dielectric layer around the second metallization pattern and on the first dielectric layer, the second dielectric layer including a photosensitive molding compound; patterning the second dielectric layer with openings exposing portions of the second metallization pattern; and forming a third metallization pattern on the second dielectric layer and in the openings extending through the second dielectric layer, the third metallization pattern coupled to the portions of the second metallization pattern exposed by the openings.