US Patent Application 18366156. A MULTI-LAYERED RESISTOR WITH A TIGHT TEMPERATURE COEFFICIENT OF RESISTANCE TOLERANCE simplified abstract

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A MULTI-LAYERED RESISTOR WITH A TIGHT TEMPERATURE COEFFICIENT OF RESISTANCE TOLERANCE

Organization Name

Taiwan Semiconductor Manufacturing Company, Ltd.==Inventor(s)==

[[Category:Szu-Hsien Lo of Hsinchu County (TW)]]

[[Category:Che-Hung Liu of Hsinchu City (TW)]]

[[Category:Tzu-Chung Tsai of Hsinchu County (TW)]]

A MULTI-LAYERED RESISTOR WITH A TIGHT TEMPERATURE COEFFICIENT OF RESISTANCE TOLERANCE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18366156 titled 'A MULTI-LAYERED RESISTOR WITH A TIGHT TEMPERATURE COEFFICIENT OF RESISTANCE TOLERANCE

Simplified Explanation

The abstract of this patent application describes an integrated chip (IC) that includes a substrate and a resistor on top of the substrate. The resistor consists of a first metal nitride structure, a second metal nitride structure, and a metal structure between them. There is also a dielectric structure over the substrate and the resistor.

  • The patent application is for an integrated chip (IC) design.
  • The IC includes a resistor that is built on top of a substrate.
  • The resistor is made up of two metal nitride structures with a metal structure in between them.
  • The IC also has a dielectric structure covering the substrate and the resistor.


Original Abstract Submitted

Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a substrate. A resistor overlies the substrate. The resistor comprises a first metal nitride structure, a second metal nitride structure spaced from the first metal nitride structure, and a metal structure disposed between the first metal nitride structure and the second metal nitride structure. A first dielectric structure is disposed over the substrate and the resistor.

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